MT28F642D20FN-705TET 查看數據表（PDF） - Micron Technology

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MT28F642D20FN-705TET

FLASH MEMORY

Micron Technology 

ADVANCE

4 MEG x 16

ASYNC/PAGE/BURST FLASH MEMORY

Table 5

Command Descriptions

CODE DEVICE MODE BUS CYCLE

DESCRIPTION

10h APA

First

Prepares the CSM for an ACCELERATED PROGRAM ALGORITHM

(APA) command.

20h Erase Setup

First

Prepares the CSM for the ERASE command. If the next command is

not a CHECK BLOCK ERASE or ERASE CONFIRM command, the

command will be ignored, and the bank will go to the read status

mode and wait for another command.

40h Program Setup

First

A two-cycle command: The first cycle prepares for a PROGRAM

operation, and the second cycle latches addresses and data and

initiates the WSM to execute the program algorithm. The Flash

outputs status register data on the rising edge of ADV#, or on the

rising clock edge when ADV# is LOW during synchronous burst

mode, or on the falling edge of OE# or CE#, whichever occurs first.

50h Clear Status

Register

First

The WSM can set the block lock status (SR1), VPP status (SR3),

program status (SR4), and erase status (SR5) bits in the status register

to “1,” but it cannot clear them to “0.” Issuing this command clears

those bits to “0.”

60h Protection

Configuration

Setup

First

Prepares the CSM for changes to the block locking status. If the next

command is not BLOCK UNLOCK, BLOCK LOCK, or BLOCK LOCK

DOWN, the command will be ignored, and the device will go to the

read status mode.

Set Read

Configuration

Register

First

Puts the device into the set read configuration mode so that it will

be possible to set the option bits related to burst read mode.

70h Read Status

Register

First

Places the device into a read status register mode. Reading the

device will output the contents of the status register for the

addressed bank. The device will automatically enter this mode for

the addressed bank after a PROGRAM or ERASE operation has been

initiated.

90h Read Protection

Configuration

First

Puts the device into the read protection configuration mode so that

reading the device will output the manufacturer/device codes, block

lock status, protection register, or protection register lock status.

98h Read Query

First

Puts the device into the read query mode so that reading the device

will output common flash interface information.

B0h Program Suspend

First

Issuing this command will suspend the currently executing

PROGRAM/ERASE/CHECK BLOCK ERASE operation. The status register

Erase Suspend

will indicate when the operation has been successfully suspended by

setting either the program suspend (SR2) or erase suspend (SR6) bit,

Check Block

and the WSM status bit (SR7) to a “1” (ready). The WSM will

Erase Suspend

continue to idle in the suspend state, regardless of the state of all

input control signals except RST#, which will immediately shut down

the WSM and the remainder of the chip if RST# is driven to VIL.

(continued on next page)

4 Meg x 16 Async/Page/Burst Flash Memory

MT28F642D18_3.p65 – Rev. 3, Pub. 8/02

11

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2002, Micron Technology, Inc.

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