APW7063 查看數據表（PDF） - Anpec Electronics

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APW7063

Synchronous Buck PWM and Linear Controller

Anpec Electronics 

APW7063

Functional Pin Description

RT (Pin 1)

This pin can adjust the switching frequency. Connect

a resistor from RT to VCC for decreasing the switching

frequency, Conversely, connect a resistor from RT to

GND for increasing the s witc hing frequency (see

Ty pical Characteristics).

SS (Pin 2)

VOLTAGE

VSOFT START

VOUT2

V OUT1

Connect a capacitor from this pin t o GND to set the

soft -start interval of t he converter. An internal 10µA

current source charges this capacitor to 5.2V. The SS

voltage clamps the reference voltage to the SS voltage,

and Figure1 shows the soft-start interval. At t0, the

internal sourc e current starts to charge the capacitor

and the internal 0.8V reference also starts to rise and

follows the SS. Until the internal reference reaches to

0.8V at t2, the soft-st art interval is completed. This

method provides a rapid and controlled output voltage

ris e. The way of the Soft-Start of the output 2 is the

same as the output1, but it starts from the SS at 2.2V

to 3.0V. The A PW 7063 als o provides t he int ernal

S oft-S tart whic h is fix ed to 2ms (t 0 t o t 1). If the

ex ternal Soft-Start interval is slower than the internal

S oft -S t art int erval (CSS< 0. 025uF) or no ex ternal

capacitor, the Soft-S tart will follow t he internal Soft-

St art.

TSoft-Start = t1 - t0 = C SS × 0.8V

ISS

t3 = t2 + C SS × 0.8V

I SS

FB

FBL

t0

t1

t2

t3

Figure 1. Soft-Start Interval

TIME

VREG (Pin 3)

An internal regulator will s upply 6V for boost voltage,

a 1uF capacitor to GND is recommended for stability.

If the VREG voltage has variation by other interference,

the IC can not work normally. W hen the VCC< 8V,

don’t use the VREG for BOOST voltage.

FB (Pin 4)

FB pin is the inverting input of the error amplifier, and it

receives the feedback voltage from an external resistive

divider across the output (VOUT). The output voltage is

determined by :

VOUT

=

0.8V

×

1+

ROUT

RGND



Where:

CSS = external Soft-Start capacitor

ISS = Soft-Start current = 10µA

CSS

t2 =

× 2.2V

ISS

where ROUT is the resistor connected from VOUT to FB,

and RGND is the resistor connected from FB to GND.

When the FB voltage is under 50% Vref, it will cause

the under voltage protection, and shutdown the device.

Remove the condition and restart the V CC voltage or

pull the COMP from low to high once, will enable the

device again.

C opyright © ANPEC Electronics C orp.

6

Rev. A.7 - Nov., 2005

www.anpec.com.tw

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