APW7176QBI 查看數據表（PDF） - Anpec Electronics
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APW7176QBI Datasheet PDF : 16 Pages
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APW7176
Pin Description
PIN
NO.
NAME
1
EN1
2
FB1
3
IN2
4
GND2
5
SW2
6
EN2
7
8
9
10
Exposed
Pad
FB2
IN1
GND1
SW1
NC
FUNCTION
Channel 1 Enable Control Input. Drive EN1 above 1V to turn on the Channel 1. Drive EN1 below 0.4V to
turn it off. In shutdown situation, all functions are disabled to decrease the supply current below 1µA.
Don’t left this pin floating.
Channel 1 Feedback Input. Connect FB1 to the center point of the external resistor divider. The
feedback voltage is 0.6V.
Channel 2 Supply Input. Bypass to the GND2 with a 4.7µF or greater ceramic capacitor.
Ground 2. Connected the exposed pad to the GND2.
Channel 2 Power Switch Output. Inductor connection to drains of the internal PMOSFET and NMOSFET
switches.
Channel 2 Enable Control Input. Drive EN2 above 1V to turn on the Channel 2. Drive EN2 below 0.4V to
turn it off. In shutdown situation, all functions are disabled to decrease the supply current below 1µA.
Don’t left this pin floating.
Channel 2 Feedback Input. Connect FB2 to the center point of the external resistor divider. The
feedback voltage is 0.6V.
Channel 1 Supply Input. Bypass to the GND1 with a 4.7µF or greater ceramic capacitor.
Ground 1. Connected the exposed pad to the GND1.
Channel 1 Power Switch Output. Inductor connection to drains of the internal PMOSFET and NMOSFET
switches.
No Internal Connection. Connecting this pad to GND1 and GND2.
Block Diagram
EN1/EN2
Shutdown
Control
Over-
Temperature
Protection
Oscillator
Logic Control
Current
Limit
∑
ICMP
COMP
EAMP
Gate
Driver
Soft-
start
VREF
0.6V
Diagram Represents 1/2 of the APW7176
Copyright © ANPEC Electronics Corp.
6
Rev. A.1 - Mar., 2011
IN1/IN2
SW1/SW2
GND1/GND2
FB1/FB2
www.anpec.com.tw
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