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AS1500-TZ 查看數據表(PDF) - austriamicrosystems AG

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产品描述 (功能)
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AS1500-TZ
AmsAG
austriamicrosystems AG AmsAG
AS1500-TZ Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Data Sheet AS1500/1/2/3
AS1500 / AS1501 – SPECIFICATIONS
VDD = 3V±10% or 5V±10%, VA = VDD, VB = 0V, –40°C TA +125°C unless otherwise noted.
ELECTRICAL CHARACTERISTICS – 10k and 20k VERSIONS
Parameter
Symbol Conditions
Min
DC CHARACTERISTICS RHEOSTAT MODE
Nominal Resistance4
RAB
TA = 25°C, VDD = 5V, AS1500, Version: 10k
TA = 25°C, VDD = 5V, AS1501, Version: 20k
8
16
Resistance Tempco5
RAB/T VAB = VDD, Wiper = No Connect
Wiper Resistance
RW VDD = 5V
20
Resistor Differential NL6
R-DNL RWB, VDD = 5V, VA = No Connect
–1
Resistor Integral NL
R-INL RWB, VDD = 5V, VA = No Connect
–2
DC CHARACTERISTICS POTENTIOMETER DIVIDER
Resolution
N
Integral Nonlinearity
INL
VDD = 5.5V TA = 25°C
VDD = 2.7V TA = 25°C
–2
–2
Differential Nonlinearity
DNL
VDD = 5.5V TA = 25°C
VDD = 2.7V TA = 25°C
–1
–1
Voltage Divider Tempco VW /T Code = 80H
Full-Scale Error
VWFSE Code = FFH, VDD = 5.5V
–4
Zero-Scale Error
VWZSE Code = 00H, VDD = 5.5V
0
RESISTOR TERMINALS
Voltage Range7
VA, B, W
0
Capacitance8 Ax, Bx
CA, B f =1MHz, Measured to GND, Code = 80H
Capacitance Wx
CW f =1MHz, Measured to GND, Code = 80H
DIGITAL INPUTS AND OUTPUTS
Input Logic High
VIH VDD = 5V
2.4
Input Logic Low
VIL VDD = 5V
Input Logic High
VIH VDD = 3V
2.1
Input Logic Low
VIL VDD = 3V
Input Current
Input Capacitance
POWER SUPPLIES
IIH, IIL
CIL
VIN = 5V or 0V, VDD = 5V
Power Supply Range
VDD
2.7
Supply Current (CMOS)
Supply Current (TTL)9
Power Dissipation
(CMOS)10
IDD
IDD
PDISS
VIH = VDD or VIL = 0V, VDD = 5.5V
VIH = 2.4V or 0.8V, VDD = 5.5V
VIH = VDD or VIL = 0V, VDD = 5.5V
Power Supply Suppression
Ratio
PSSR
DYNAMIC CHARACTERISTICS11
VDD = 5V + 0.5VP
sine wave @ 1kHz
AS1500, Version: 10k
AS1501, Version: 20k
Bandwidth –3dB
Bandwidth –3dB
BW_10k RWB = 10kΩ, VDD = 5V
BW_20k RWB = 20kΩ, VDD = 5V
Total Harmonic Distortion THDW VA = 1VRMS + 2VDC, VB = 2VDC, f = 1kHz
VW Settling Time
tS_10k
tS_20k
RWB = 5k, VA = VDD, VB = 0V, ±1% Error
Band
RWB = 10k, VA = VDD, VB = 0V, ±1% Error
Band
Resistor Noise Voltage
eNWB_10k RWB = 5k, f =1kHz
eNWB_20k RWB = 10k, f =1kHz
Table 3: Electrical Characteristics – 10k and 20k Versions
Typ3 Max
10 12
20 24
500
100 200
±1/4 +1
±1/2 +2
8
±1/2 +2
±1/2 +2
±1/4 +1
±1/4 +1
15
–2.8 0
1.3 2
VDD
75
120
0.8
0.6
±1
5
5.5
0.1
1
0.9
4
27.5
-54 -25
-52 -25
1000
500
0.003
2
4
9
13
Unit
k
k
ppm/°C
LSB
LSB
Bits
LSB
LSB
LSB
LSB
ppm/°C
LSB
LSB
V
pF
pF
V
V
V
V
µA
pF
V
µA
mA
µW
dB
dB
kHz
kHz
%
µs
µs
nV/ Hz
nV/ Hz
3 Typicals represent average readings at 25°C and VDD = 5V.
4 Wiper is not connected. IAB = 350µA for the 10kversion and 175µA for the 20kversion.
5 All Tempcos are guaranteed by design and not subject to production test.
6 Terminal A is not connected. IW = 350µA for the 10kversion and 175µA for the 20kversion.
7 Resistor terminals A, B, W have no limitations on polarity with respect to each other.
8 All capacitances are guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5V
bias on the measured terminal. The remaining resistor terminals are left open circuit.
9 Worst-case supply current consumed when input logic level at 2.4V, standard characteristic of CMOS logic.
10 PDISS is calculated from (IDD×VDD). CMOS logic level inputs result in minimum power dissipation.
11 All dynamic characteristics are guaranteed by design and not subject to production test. All dynamic characteristics use VDD=5V.
Revision 1.0, Oct 2004
Page 3 of 8

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