AS1526-BSOU 查看數據表（PDF） - austriamicrosystems AG

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AS1526-BSOU

10-Bit, Single Supply, Low-Power, 73ksps A/D Converters

austriamicrosystems AG 

AS1526/AS1527

Data Sheet - Electrical Characteristics

Table 3. Electrical Characteristics (Continued)

Symbol

Parameter

Digital Inputs: SCLK, SHDNN, CSN

VIH SCLK, CSN Input High Voltage

Conditions

VIL SCLK, CSN Input Low Voltage

VHYST

IIN

CIN

SCLK, CSN Input Hysteresis

SCLK, CSN Input Leakage

SCLK, CSN Input Capacitance 7

VIN = 0V or VDD

VSH

SHDNN Input High Voltage

VSL

SHDNN Input Low Voltage

SHDNN Input Current

SHDNN = 0V or VDD

VSM

SHDNN Input Mid Voltage

VFLT

SHDNN Voltage, Floating

SHDNN Max Allowed Leakage,

Mid Input

Digital Output: DOUT

VOL

Output Voltage Low

SHDNN = float

SHDNN = float

ISINK = 5mA

ISINK = 16mA

VOH

Output Voltage High

ISOURCE = 0.5mA

IL

Tri-State Leakage Current

COUT Tri-State Output Capacitance

Power Requirements

VDD

Supply Voltage

IDD

Supply Current

PSR

Power-Supply Rejection 8

CSN = VDD

CSN = VDD 7

Int. Reference (AS1526), VDD = 3.6V

External Reference, VDD = 3.6V

Shutdown mode, VDD = 3.6V

VDD = VDDMIN to VDDMAX,

full-scale input

Min Typ Max

0.7x

VDD

0.3x

VDD

0.2

±0.01 ±1

15

VDD -

0.4

0.4

±4.0

1.1

VDD -

1.1

VDD/2

±50

0.4

0.8

VDD -

0.5

±0.01 ±10

15

2.7

3.6

1.4 2.0

1.0 1.4

0.3

2

±1

Units

V

V

V

µA

pF

V

V

µA

V

V

nA

V

V

µA

pF

V

mA

µA

mV

1. Tested at VDD = +2.7V.

2. Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale

range and offset have been calibrated.

3. Offset nulled.

4. Achievable with standard timing (see Figure 25 on page 13).

5. Sample tested at 0.1% AQL.

6. External load should not change during conversion for specified accuracy.

7. Guaranteed by design; not subject to production testing.

8. Measured as [VFS(VDDMIN) - VFS(VDDMAX)] with external reference.

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