AS1744G-T 查看數據表（PDF） - austriamicrosystems AG

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产品描述 (功能)

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AS1744G-T

High-Speed, Low-Voltage, Dual, Single-Supply, 4Ω, SPDT Analog Switches

austriamicrosystems AG 

AS1744, AS1745

Data Sheet

austriamicrosystems

Timing Diagrams and Test Setups

Timing Diagrams and Test Setups

Figure 11. Switching Time

V+

V+

VIN NOx or NCx

NCx or NOx

INx

Logic

Input

AS1744/

AS1745

COMx

RLOAD

VOUT

CLOAD †

VIH + 0.5V

Logic

Input 0

VOUT

Switch

Output 0

GND

† Includes stray capacitance and fixture capacitance.

50%

50%

tR < 5ns

tF < 5ns

tOFF

0.9 x VOUT

0.9 x VOUT

tON

Logic input waveforms inverted for switches

that have the opposite logic sense.

Figure 12. Break-Before-Make Interval

V+

V+

VIN NOx or NCx

AS1744/

AS1745

COMx

NCx or NOx

INx

RLOAD

Logic

Input

GND

VOUT

CLOAD †

VIH + 0.5V

Logic

Input

0

VOUT

50%

† Includes stray capacitance and fixture capacitance.

tD

tR < 5ns

tF < 5ns

0.9 x VOUT

Figure 13. Charge Injection

V+

V+

INx

VINL to

VINH

COMx

RGEN

VGEN

AS1744/

AS1745

GND

NCx

or NOx

VOUT

CLOAD

VOUT

INx

Off

∆VOUT

Off

On

Off

INx

On

Off

INx depends on switch configuration; input polar-

ity is determined by the sense of the switches.

Q = ∆VOUT x CLOAD

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Revision 1.53

8 - 16

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