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AS8ER128K32 查看數據表(PDF) - Austin Semiconductor

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产品描述 (功能)
生产厂家
AS8ER128K32
AUSTIN
Austin Semiconductor AUSTIN
AS8ER128K32 Datasheet PDF : 18 Pages
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Austin Semiconductor, Inc.
EEPROM
AS8ER128K32
CAPACITANCE TABLE1 (VIN = 0V, f = 1 MHz, TA = 25oC)
SYMBOL
CADD
COE
CWE, CCE
CIO
PARAMETER
A0 - A16 Capacitance
OE\, RES\, RDY Capacitance
WE\ and CE\ Capacitance
I/O 0- I/O 31 Capacitance
MAX
40
40
12
20
NOTE: 1. This parameter is guaranteed but not tested.
UNITS
pF
pF
pF
pF
AC TEST CHARACTERISTICS
TEST SPECIFICATIONS
Input pulse levels...........................................VSS to 3V
Input rise and fall times...........................................5ns
Input timing reference levels.................................1.5V
Output reference levels.........................................1.5V
Output load................................................See Figure 1
NOTES:
Vz is programmable from -2V to + 7V.
I and I programmable from 0 to 16 mA.
OL
OH
Vz is typically the midpoint of VOH and VOL.
IOL and IOH are adjusted to simulate a typical resistive load
circuit.
Current Source
Device
-
Under
Test
+
Ceff = 50pf
Current Source
IOL
+
IOH
Figure 1
Vz = 1.5V
(Bipolar
Supply)
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC < TA < +125oC or -40oC to +85oC; Vcc = 5V +10%)
DESCRIPTION
Address to Output Delay
CE\ to Output Delay
OE\ to Output Delay
TEST CONDITIONS
CE\ = OE\ = VIL, WE\ = VIH
OE\ = VIL, WE\ = VIH
OE\ = VIL, WE\ = VIH
SYMBOL
tACC
tCE
tOE
150
MIN MAX
150
150
10
75
UNITS
ns
ns
ns
Address to Output Hold
CE\ = OE\ = VIL, WE\ = VIH
tOH
0
ns
CE\ or OE\ high to Output Float (1) OE\ = VIL, WE\ = VIH
tDF
0
50
ns
RES\ low to Output Float (1)
CE\ = OE\ = VIL, WE\ = VIH
tDFR
0
350
ns
RES\ to Output Delay
CE\ = OE\ = VIL, WE\ = VIH
tRR
0
450
ns
AS8ER128K32
Rev. 5.3 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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