AS8SLC512K32 查看數據表（PDF） - Austin Semiconductor

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AS8SLC512K32

512K x 32 SRAM SRAM Memory Array MCM

Austin Semiconductor 

Austin Semiconductor, Inc.

SRAM

AS8SLC512K32

WRITE CYCLE NO. 1

(Chip Select Controlled)

ADDRESS

CS\

tAS111112222233333444445555566666

WE\ 111122223333444455556666777788889999

tWC

tAW

tCW

tWP21

tAH

11112222333344445555666677778888999900001111111122222222333333334444544455546555666576766677

DATA I/O

tDS

tDH

DATA VALID

WRITE CYCLE NO. 2

(Write Enable Controlled)

tWC

ADDRESS

CS\ 1111111111222222222233333333334444444444555555555566666777778888899999

tAW tCW

WE\

tAS11112222333344445555

tWP11

DATAI/O 111222333444555666777888999000111tH222Z333W441114E222333444

11111222223333344444t55555A66666H7777788888999990000011111111112222222222333333333344444544445555465555666657676666777

tDS

DATA

tLZWE

tDH

VALID

111222111333221112444332232443334

NOTES

1. All voltages referenced to V (GND).

SS

AS8SLC512K32

Rev. 2.5 5/09

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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