AT24C512C-SUM 查看數據表（PDF） - Atmel Corporation
零件编号
产品描述 (功能)
生产厂家
AT24C512C-SUM Datasheet PDF : 21 Pages
| |||
3. Block Diagram
V
CC
GND
WP
SCL
SDA
A2
A
1
A0
Start
Stop
Logic
LOAD
Device
Address
Comparator
R/W
Serial
Control
Logic
COMP
LOAD INC
EN H.V. Pump/Timing
Data Recovery
Data Word
Addr/counter
EEPROM
DIN
DOUT
Y DEC
Serial MUX
DOUT/ACK
Logic
4. Pin Descriptions
Serial Clock (SCL) — The SCL input is used to positive-edge clock data into each EEPROM device and negative-edge
clock data out of each device.
Serial Data (SDA) — The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven, and may be
wire-ORed with any number of other open-drain or open-collector devices.
Device Addresses (A2, A1, A0) — The A2, A1, and A0 pins are device address inputs that are hardwired or left not
connected for compatibility with other Atmel AT24Cxx devices. When the pins are hardwired, as many as eight 512K
devices may be addressed on a single bus system (see Section 7. “Device Addressing” on page 9 for more details). If
these pins are left floating, the A2, A1, and A0 pins will be internally pulled down to GND. However, due to capacitive
coupling that may appear during customer applications, Atmel recommends always connecting the address pins to a
known state. When using a pull-up resistor, Atmel recommends using 10k or less.
Write Protect (WP) — The Write Protect input, when connected to GND, allows normal write operations. When WP pin
is connected directly to VCC, all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be
internally pulled down to GND; however, due to capacitive coupling that may appear during customer applications, Atmel
recommends always connecting the WP pin to a known state. When using a pull-up resistor, Atmel recommends using
10k or less.
Table 4-1. Write Protect
WP Pin
Status
At VCC
At GND
Part of the Array Protected
Atmel AT24C512C
Full Array
Normal Read/Write Operations
Atmel AT24C512C [DATASHEET]
3
8720C–SEEPR–7/12
Share Link: 