AT25640B-SSHL-B(2012) 查看數據表（PDF） - Atmel Corporation

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AT25640B-SSHL-B
(Rev.:2012)

SPI Serial EEPROM 32Kb (4096 x 8) and 64Kb (8192 x 8)

Atmel Corporation 

1. Pin Configurations and Pinouts

Block Write Protection is enabled by programming the status register with one of four blocks of write protection. Separate

Program Enable and Program Disable instructions are provided for additional data protection. Hardware data protection

is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used

to suspend any serial communication without resetting the serial sequence.

Table 1-1. Pin Configurations

Pin Name

CS

SCK

SI

SO

GND

VCC

WP

HOLD

Function

Chip Select

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

Power Supply

Write Protect

Suspends Serial Input

Figure 1-1. Pinouts

CS

SO

WP

GND

8-lead SOIC

1

8

2

7

3

6

4

5

Top View

VCC

HOLD

SCK

SI

CS

SO

WP

GND

8-lead TSSOP

1

8

2

7

3

6

4

5

Top View

VCC

HOLD

SCK

SI

8-pad UDFN

VCC 8

HOLD 7

SCK 6

SI 5

1 CS

2 SO

3 WP

4 GND

Bottom View

8-pad XDFN

VCC 8

HOLD 7

SCK 6

SI 5

1 CS

2 SO

3 WP

4 GND

Bottom View

8-ball VFBGA

VCC 8

HOLD 7

1 CS

2 SO

SCK 6

SI 5

3 WP

4 GND

Bottom View

Note: Drawings are not to scale.

Atmel AT25320B/640B [DATASHEET]

2

8535G–SEEPROM–11/2012

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