AT25320B-XHL-T(2012) 查看數據表（PDF） - Atmel Corporation
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AT25320B-XHL-T Datasheet PDF : 24 Pages
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5. Functional Description
The AT25320B/640B is designed to interface directly with the synchronous Serial Peripheral Interface (SPI) of the 6805
and 68HC11 series of microcontrollers.
The AT25320B/640B utilizes an 8-bit instruction register. The list of instructions and their operation codes are contained
in Table 5-1. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-low CS
transition.
Table 5-1. Instruction Set
Instruction Name
WREN
WRDI
RDSR
WRSR
READ
WRITE
Instruction Format
0000 X110
0000 X100
0000 X101
0000 X001
0000 X011
0000 X010
Operation
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
Write Enable (WREN): The device will power-up in the write disable state when VCC is applied. All programming
instructions must therefore be preceded by a Write Enable instruction.
Write Disable (WRDI): To protect the device against inadvertent writes, the Write Disable instruction disables all
programming modes. The WRDI instruction is independent of the status of the WP pin.
Read Status Register (RDSR): The Read Status Register instruction provides access to the status register. The
Ready/Busy and Write Enable status of the device can be determined by the RDSR instruction. Similarly, the Block Write
Protection Bits indicate the extent of protection employed. These bits are set by using the WRSR instruction.
Table 5-2. Status Register Format
Bit 7
WPEN
Bit 6
X
Bit 5
X
Bit 4
X
Bit 3
BP1
Bit 2
BP0
Bit 1
WEN
Bit 0
RDY
Table 5-3. Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = 0 (RDY) indicates the device is READY. Bit 0 = 1 indicates the write cycle is in progress.
Bit 1 (WEN)
Bit 1= 0 indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates the device is write enabled.
Bit 2 (BP0)
See Table 5-4 on page 9.
Bit 3 (BP1)
See Table 5-4 on page 9.
Bits 4–6 are zeros when device is not in an internal write cycle.
Bit 7 (WPEN)
See Table 5-5 on page 9.
Bits 0–7 are ones during an internal write cycle.
Atmel AT25320B/640B [DATASHEET]
8
8535G–SEEPROM–11/2012
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