AT25FS040 查看數據表（PDF） - Atmel Corporation
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AT25FS040 Datasheet PDF : 25 Pages
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3. Operating Features
3.1 Recommended Power-up
When the power supply is turned on, the Vcc to the device rises monotonically from ground to
the full operating Vcc. During this time, the Chip Select (CS) signal is not allowed to float and
must follow Vcc. For this reason, it is recommended to use a suitable pull-up resistor connected
between CS and Vcc. The device is ready for communication once a stable Vcc is reached
within the specified operating voltage range.
3.2 Recommended Power-down
The device must be deselected and in standby and write disabled mode prior to Vcc power down
sequence. This means there should be no write operation/internal write cycle or read operation
in progress during power down. The Vcc decay should be monotonic from Vcc to ground and the
Chip Select (CS) line must be allowed to follow Vcc during power down. After power down, it is
recommended Vcc should be held at ground level for at least 0.5 seconds before power up
again.
3.3 Power On Reset Protection
In order to prevent data corruption and inadvertent write operations during device power-up and
power down, a Power On Reset (POR) circuit is enabled. At Power-up (continuous rise of Vcc
from 0v), the device will not respond to any instruction and will be held in reset (which puts the
device in standby mode) until the Vcc has reached the Power On Reset threshold voltage. This
threshold is lower than the minimum specified Vcc operating voltage.
At power down (continuous fall of Vcc), when Vcc drops from the operating voltage below the
POR threshold, all operations are disabled and the device will not respond to any command. A
stable and valid Vcc must be applied before executing any communication. Please note: The
POR threshold trip point is ~1.8V for Serial Flash products and is ensured by design to have a
reset during power-up and power down and is not 100% tested.
6 AT25FS040
5107E–SFLSH–8/07
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