AT28LV256 查看數據表（PDF） - Atmel Corporation

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AT28LV256

256K (32K x 8) Low Voltage CMOS E2PROM

Atmel Corporation 

Description (Continued)

64-bytes of data are internally latched, freeing the address

and data bus for other operations. Following the initiation

of a write cycle, the device will automatically write the

latched data using an internal control timer. The end of a

write cycle can be detected by DATA polling of I/O7. Once

the end of a write cycle has been detected a new access

for a read or write can begin.

Atmel’s 28LV256 has additional features to ensure high

quality and manufacturability. The device utilizes internal

error correction for extended endurance and improved

data retention characteristics. An optional software data

protection mechanism is available to guard against inad-

vertent writes. The device also includes an extra 64-bytes

of E2PROM for device identification or tracking.

Block Diagram

Absolute Maximum Ratings*

Temperature Under Bias................. -55°C to +125°C

Storage Temperature...................... -65°C to +150°C

All Input Voltages

(including NC Pins)

with Respect to Ground ................... -0.6V to +6.25V

All Output Voltages

with Respect to Ground .............-0.6V to VCC + 0.6V

Voltage on OE and A9

with Respect to Ground ................... -0.6V to +13.5V

*NOTICE: Stresses beyond those listed under “Absolute Maxi-

mum Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of the

device at these or any other conditions beyond those indi-

cated in the operational sections of this specification is not

implied. Exposure to absolute maximum rating conditions

for extended periods may affect device reliability.

2-146

AT28LV256

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