AT40K40-2EQC 查看數據表（PDF） - Atmel Corporation

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AT40K40-2EQC

5K - 50K Gates Coprocessor FPGA with FreeRAM™

Atmel Corporation 

The Symmetrical

Array

At the heart of the Atmel architecture is a symmetrical array of identical cells,

see Figure 1. The array is continuous from one edge to the other, except for bus repeat-

ers spaced every four cells, see Figure 2 on page 5. At the intersection of each repeater

row and column there is a 32 x 4 RAM block accessible by adjacent buses. The RAM

can be configured as either a single-ported or dual-ported RAM(1), with either synchro-

nous or asynchronous operation.

Note: 1. The right-most column can only be used as single-port RAM.

Figure 1. Symmetrical Array Surrounded by I/O (AT40K20)

= I/O Pad

= AT40K Cell

= Repeater Row

= Repeater Column

= FreeRAM

4 AT40K/AT40KLV Series FPGA

0896C–FPGA–04/02

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