AT88SC25616C-MP 查看數據表（PDF） - Atmel Corporation
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AT88SC25616C-MP Datasheet PDF : 18 Pages
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AT88SC25616C
Reset (RST)
The AT88SC25616C provides an ISO 7816-3 compliant asynchronous answer to reset
sequence. When the reset sequence is activated, the device will output the data programmed
into the 64-bit answer-to-reset register. An internal pull-up on the RST input pad allows the
device to be used in synchronous mode without bonding RST. The AT88SC25616C does not
support the synchronous answer-to-reset sequence.
Serial Data (SDA/IO)
The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be
wired with any number of other open drain or open collector devices. An external pull-up resistor
should be connected between SDA and VCC. The value of this resistor and the system capaci-
tance loading the SDA bus will determine the rise time of SDA. This rise time will determine the
maximum frequency during read operations. Low value pull-up resistors will allow higher fre-
quency operations while drawing higher average power. SDA/IO information applies to both
asynchronous and synchronous protocols.
When the synchronous protocol is used, the SCL/CLK input is used to positive edge clock data
into the device and negative edge clock data out of the device.
Table 2. DC Characteristics
Applicable over recommended operating range from VCC = +2.7 to 5.5V, TAC = -40oC to +85oC (unless otherwise noted)
Symbol Parameter
Test Condition
Min
Typ
Max
Units
VCC
Supply Voltage
2.7
ICC
Supply Current (VCC = 5.5V)
Async READ at 3.57MHz
ICC
Supply Current (VCC = 5.5V)
Async WRITE at 3.57MHz
ICC
Supply Current (VCC = 5.5V)
Synch READ at 1MHz
ICC
Supply Current (VCC = 5.5V)
Synch WRITE at 1MHz
ISB
Standby Current (VCC = 5.5V)
VIN = VCC or GND
VIL
SDA/IO Input Low Threshold(1)
VIL
SCL/CLK Input Low Threshold(1)
VIL
RST Input Low Threshold(1)
VIH
SDA/IO Input High Threshold(1)
VIH
SCL/CLK Input High Threshold(1)
VIH
RST Input High Threshold(1)
0
0
0
VCC x 0.7
VCC x 0.7
VCC x 0.7
IIL
SDA/IO Input Low Current
0 < VIL < VCC x 0.15
IIL
SCL/CLK Input Low Current
0 < VIL < VCC x 0.15
IIL
RST Input Low Current
0 < VIL < VCC x 0.15
IIH
SDA/IO Input High Current
VCC x 0.7 < VIH < VCC
5.5
V
5
mA
5
mA
5
mA
5
mA
1
mA
VCC x 0.2
V
VCC x 0.2
V
VCC x 0.2
V
VCC
V
VCC
V
VCC
V
15
uA
15
uA
50
uA
20
uA
IIH
IIH
VOH
VOL
IOH
Note:
SCL/CLK Input High Current
RST Input High Current
SDA/IO Output High Voltage
VCC x 0.7 < VIH < VCC
VCC x 0.7 < VIH < VCC
20K ohm external pull-up
SDA/IO Output Low Voltage
IOL = 1mA
SDA/IO Output High Current
VOH
1. VIL min and VIH max are reference only and are not tested.
VCC x 0.7
0
100
uA
150
uA
VCC
V
VCC x 0.15
V
20
uA
3
5017HS–SMEM–11/08
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