AT88SC3216CRF-MS1 查看數據表（PDF） - Atmel Corporation

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AT88SC3216CRF-MS1

13.56 MHz CryptoRF® EEPROM Memory 32 Kbits

Atmel Corporation 

AT88SC3216CRF

• RFU – Reserved for Future Use: any feature, memory location, or bit that is held as reserved

for future use

• $ xx – Hexadecimal Number: denotes a hex number “xx” (Most Significant Bit on left)

3.1 Anticollision Protocol

When the PICC enters the 13.56 MHz RF field of the host reader (PCD), it performs a power on

reset (POR) function and waits silently for a valid Type B polling command. The CryptoRF PICC

processes the antitearing registers as part of the POR process.

The PCD initiates the anticollision process by issuing an REQB or WUPB command. The WUPB

command activates any card (PICC) in the field with a matching AFI code. The REQB command

performs the same function but does not affect a PICC in the Halt state. The CryptoRF com-

mand set is available only after the anticollision process has been completed.

3.2 CRC Error Detection

A two-byte CRC_B is required in each frame transmitted by the PICC or PCD to permit transmis-

sion error detection. The CRC_B is calculated on all of the command and data bytes in the

frame. The SOF, EOF, start bits, stop bits, and EGT are not included in the CRC_B calculation.

The two-byte CRC_B follows the data bytes in the frame.

Figure 3-1. Location of the Two CRC_B Bytes within a Frame

SOF

K data bytes

CRC1 CRC2

EOF

3.3 Type A Tolerance

The RF Interface is designed for use in multiprotocol applications. It will not latch or lock up if

exposed to Type A signals and will not respond to them. The PICC may reset in the presence of

Type A field modulation but is not damaged by exposure to Type A signals.

3

5005DS–CRRF–04/09

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