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ATA01502D1C 查看數據表(PDF) - ANADIGICS

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ATA01502D1C
Anadigics
ANADIGICS Anadigics
ATA01502D1C Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ATA01502
1.55
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
VDD = 5.5 V VDD = 5.0V
VDD = 4.5V
- 40
10
60
Temperature (OC)
Figure 9: Input Offset Voltage vs. Temperature
Indirect Measurement of Optical Overload
Optical overload can be defined as the maximum
optical power above, which the BER (bit error rate)
increases beyond 1 error in 1010 bits. The
ATA01502D1C is 100% tested at die sort by a DC
measurement, which has excellent correlation with
a PRBS optical overload measurement. The
measurement consists of sinking a negative current
(see VOUT Vs IIN figure) from the TIA and determining
the point of output voltage collapse. In addition, the
input node virtual ground during “heavy AGC” is
checked to verify that the linearity (i.e. pulse width
distortion) of the amplifier has not been
compromised. As a final test, a DC transfer curve is
performed on every die at the wafer level to ensure
excellent overload performance.
CBY Connection
The CBY pad must be connected via a low inductance
path to a surface mount capacitor of at least 56pF
(additional capacitance can be added in parallel with
the 56 pF or 220 pF capacitors to improve low
frequency response and noise performance).
Referring to the equivalent circuit diagram and the
typical bonding diagram, it is critical that the
connection from CBY to the bypass capacitor use two
bond wires for low inductance, since any high
frequency impedance at this node will be fed back to
the open loop amplifier with a resulting loss of
transimpedance bandwidth. Two pads are provided
for this purpose.
Sensitivity and Bandwidth
In order to guarantee sensitivity and bandwidth
performance, the TIA is subjected to a
comprehensive series of tests at the die sort level
(100% testing at 25 oC) to verify the DC parametric
performance and the high frequency performance
(i.e. adequate |S21|) of the amplifier. Acceptably high
|S21| of the internal gain stages will ensure low
amplifier input capacitance and hence low input
referred noise current. Transimpedance sensitivity
and bandwidth are then guaranteed by design and
correlation with RF and DC die sort test results. In
applications that require - 41 dBm sensitivity, a low
capacitance (< 0.5pF) and high responsitivity (> 0.95)
photodiode must be used.
Measurement of Input Referred Noise Current
The “Input Noise Current” is directly related to
sensitivity. It can be defined as the output noise
voltage (VOUT), with no input signal, (including a 100
MHz lowpass filter at the output of the TIA) divided by
the AC transresistance.
8
7
RF
6
1502
5
CT
50
4
3
CT = 1.0pF
2
1
CT =0.5pF
1
10
100
1000
Frequency (MHz)
Figure 10: Input Referred Noise Spectral Density
6
PRELIMINARY DATA SHEET - Rev 2
08/2001

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