ATF-35143 查看數據表（PDF） - Avago Technologies
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ATF-35143 Datasheet PDF : 18 Pages
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ATF-35143 Absolute Maximum Ratings[1]
Symbol
VDS
VGS
VGD
IDS
Pdiss
Pin max
TCH
TSTG
jc
Parameter
Drain - Source Voltage[2]
Gate - Source Voltage[2]
Gate Drain Voltage[2]
Drain Current[2]
Total Power Dissipation[4]
RF Input Power
Channel Temperature
Storage Temperature
Thermal Resistance[5]
Units
V
V
V
mA
mW
dBm
°C
°C
°C/W
Absolute
Maximum
5.5
-5
-5
Idss[3]
300
14
160
-65 to 160
150
Notes:
1. Operation of this device above any
one of these parameters may cause
permanent damage.
2. Assumes DC quiesent conditions.
3. VGS = 0 V
4. Source lead temperature is 25°C.
Derate 3.2 mW/°C for TL > 67°C.
5. Thermal resistance measured using
QFI Measurement method.
Product Consistency Distribution Charts [7, 8]
120
+0.6 V
100
80
0V
60
40
–0.6 V
20
0
0
2
4
6
8
VDS (V)
Figure 1. Typical Pulsed I-V Curves[6].
(VGS = -0.2 V per step)
200
Cpk = 3.7
Std = 0.03
160
120
-3 Std
80
+3 Std
40
120
Cpk = 1.73
Std = 0.35
100
80
-3 Std
60
+3 Std
40
20
0
19 20
21 22 23 24
OIP3 (dBm)
Figure 2. OIP3 @ 2 GHz, 2 V, 15 mA.
LSL=19.0, Nominal=20.9, USL=23.0
160
Cpk = 2.75
Std = 0.17
120
-3 Std +3 Std
80
40
0
0.2 0.3 0.4 0.5 0.6 0.7
NF (dB)
Figure 3. NF @ 2 GHz, 2 V, 15 mA.
LSL=0.2, Nominal=0.37, USL=0.7
0
16
17
18
19
20
GAIN (dB)
Figure 4. Gain @ 2 GHz, 2 V, 15 mA.
LSL=16.5, Nominal=18.0, USL=19.5
Notes:
6. Under large signal conditions, VGS may swing positive and the drain current may exceed Idss. These conditions are acceptable as long as the
maximum Pdiss and Pin max ratings are not exceeded.
7. Distribution data sample size is 450 samples taken from 9 different wafers. Future wafers allocated to this product may have nominal values
anywhere within the upper and lower spec limits.
8. Measurements made on production test board. This circuit represents a trade-off between an optimal noise match and a realizeable match
based on production test requirements. Circuit losses have been de-embedded from actual measurements.
2
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