ATTINY40 查看數據表（PDF） - Atmel Corporation

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ATTINY40

8-bit Microcontroller with 4K Bytes In-System Programmable Flash

Atmel Corporation 

ATtiny40

4.4 General Purpose Register File

The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve

the required performance and flexibility, the following input/output schemes are supported by the

Register File:

• One 8-bit output operand and one 8-bit result input

• Two 8-bit output operands and one 8-bit result input

• One 16-bit output operand and one 16-bit result input

Figure 4-2 below shows the structure of the 16 general purpose working registers in the CPU.

Figure 4-2. AVR CPU General Purpose Working Registers

General

Purpose

Working

Registers

7

0

R16

R17

R18

…

R26

R27

R28

R29

R30

R31

X-register Low Byte

X-register High Byte

Y-register Low Byte

Y-register High Byte

Z-register Low Byte

Z-register High Byte

Note:

A typical implementation of the AVR register file includes 32 general prupose registers but

ATtiny40 implements only 16 registers. For reasons of compatibility the registers are numbered

R16...R31 and not R0...R15.

4.4.1

Most of the instructions operating on the Register File have direct access to all registers, and

most of them are single cycle instructions.

The X-register, Y-register, and Z-register

Registers R26..R31 have some added functions to their general purpose usage. These registers

are 16-bit address pointers for indirect addressing of the data space. The three indirect address

registers X, Y, and Z are defined as described in Figure 4-3.

9

8263A–AVR–08/10

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