ATTINY4 查看數據表（PDF） - Atmel Corporation

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ATTINY4

Atmel 8-bit AVR Microcontroller with 512/1024 Bytes In-System Programmable Flash

Atmel Corporation 

1. Pin Configurations

Figure 1-1. Pinout of ATtiny4/5/9/10

SOT-23

(PCINT0/TPIDATA /OC0A/ADC0/AIN0) PB0 1

6 PB3 (RESET/PCINT3/ADC3)

GND 2

5 VCC

(PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1 3

4

PB2 (T0/CLKO/PCINT2/INT0/ADC2)

UDFN

(PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1

1

NC

2

NC

3

GND 4

8

PB2 (T0/CLKO/PCINT2/INT0/ADC2)

7 VCC

6

PB3 (RESET/PCINT3/ADC3)

5 PB0 (AIN0/ADC0/OC0A/TPIDATA /PCINT0)

Power

Clock

Digital

GND

Analog

NC

1.1. Pin Descriptions

1.1.1.

VCC

Digital supply voltage.

1.1.2.

GND

Ground.

1.1.3.

Port B (PB[3:0])

This is a 4-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each bit. The

output buffers have symmetrical drive characteristics, with both high sink and source capability. As inputs,

the port pins that are externally pulled low will source current if pull-up resistors are activated. Port pins

are tri-stated when a reset condition becomes active, even if the clock is not running.

1.1.4.

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if

the clock is not running and provided the reset pin has not been disabled. The minimum pulse length is

given in System and Reset Characteristics of Electrical Characteristics. Shorter pulses are not

guaranteed to generate a reset.

The reset pin can also be used as a (weak) I/O pin.

Atmel ATtiny4 / ATtiny5 / ATtiny9 / ATiny10 [DATASHEET]

4

Atmel-8127H-ATiny4/ ATiny5 /ATiny9/ ATiny10_Datasheet_Summary-11/2016

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