AV9107C-17CS08 查看數據表（PDF） - Integrated Device Technology
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AV9107C-17CS08 Datasheet PDF : 5 Pages
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AV9107C-17
Pin Configuration
Functionality
(at 14.318) MHz reference frequency input)
FS
CLK1
0
25.06 MHz
1
33.29 MHz
8-Pin DIP, SOIC
Pin Descriptions
PIN
NUMBER
1
2
3
4
5
6
7
8
PIN NAME TYPE
DESCRIPTION
FS0
GND
X1/ICLK
X2
OE
CLK1
VDD
REFCLK
Input
-
Input
Output
Input
Output
-
Output
Frequency Select 0 for CLK1.
Digital Ground.
Crystal Output or Input Clock frequency. Typically 14.318 MHz system clock.
Crystal Output (No Connect when clock used.).
Output Enable. Tristates CLK1 and REFCLK when low. Has internal pull-up.
Clock 1 Output (see decoding tables).
Digital power supply (+5V DC).
Reference Clock output. Produces a buffered version of the input clock or crystal frequency
(typically 14.318 MHz).
Frequency Transitions
A key AV9107C-17 feature is the ability to provide glitch-
free frequency transitions between its output frequencies.
Output Enable
The Output Enable feature tristates the specified output
clock pins. This places the selected output pin in a high
impedance state to allow for system level diagnostic testing.
Absolute Maximum Ratings
AVDD, VDD referenced to GND . . . . . . . . . . . . . . . 7V
Operating temperature under bias. . . . . . . . . . . . . . . . 0°C to +70°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Voltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect product reliability.
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