VSC7960 查看數據表（PDF） - Vitesse Semiconductor

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VSC7960

3.125Gb/s CML Limiting Amplifier with LOS Detect and Laser Driver with Automatic Power Control

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

3.125Gb/s CML Limiting Amplifier with LOS Detect

and Laser Driver with Automatic Power Control

Advance Product Information

VSC7960

Pin Name

DISABLE

ENABLE

FAIL

CAPC

APCSET_MD

RESERVED

MODSET

BIASMAX

MODMON

BIASMON

DATA+

DATA-

LAO-

LAO+

Pad Name

DISABLE

ENABLE

FAIL

CAPC

APCSET_MD

AUTSEL

MODSET

BIASMAX

MODMON

BIASMON

DATA+

DATA-

LAOM

LAOP

Pin/Pad

Number

24

25

26

27

28

29

32

33

35

36

38

39

46

47

Section

Description

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Laser

Driver

Limiting

Amplifier

Limiting

Amplifier

Disable Input (TTL/CMOS). If used, leave ENABLE pin

floating. Connect to GND for normal operation and VCC to

disable laser bias and modulation currents.

Enable Input (TTL/CMOS). If used, connect DISABLE to

GND. Connect to VCC for normal operation and GND to

disable laser bias and modulation currents.

Output (TTL/CMOS). When low, indicates APC failure.

Capacitor to GND sets dominant pole of the APC feedback

loop.

APCSET_MD and Monitor Diode Input. Resistor to GND sets

desired average laser optical power. If APC is not used connect

100kΩ resistor to GND. Connect to monitor photodiode anode.

Connect capacitor to ground to filter high-speed AC monitor

photocurrent.

Do not connect.

Connect resistor to GND to set desired laser modulation

current.

Connect resistor to GND to set maximum laser bias current.

The APC function can subtract from this value, but it cannot

add to it.

Modulation current monitor. Sink current source that is

proportional to the laser modulation current.

Bias current monitor. Sink current source that is proportional to

the laser bias current.

Laser Driver Noninverted Data Input (PECL)

Laser Driver Inverted Data Input (PECL)

Inverted Limiting Amplifier Data Output (CML)

Noninverted Limiting Amplifier Data Output (CML)

Page 8

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

G52359-0, Rev 2.1

05/01/01

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