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BD8381EFV-M 查看數據表(PDF) - ROHM Semiconductor

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BD8381EFV-M
ROHM
ROHM Semiconductor ROHM
BD8381EFV-M Datasheet PDF : 21 Pages
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BD8381EFV-M
Technical Note
Buck-Boost DC/DC controller
Over-voltage protection circuit (OVP)
The output of the DCDC converter should be connected to the OVP pin via a voltage divider. In determining an
appropriate trigger voltage of for OVP function, consider the total number of LEDs in series and the maximum variation in
VF. Also, bear in mind that over-current protection (OCP) is triggered at 0.85 x OVP trigger voltage. If the OVP
function engages, it will not release unless the DCDC voltage drops to 72.5% of the OVP trigger voltage. For example, if
ROVP1 (out put voltage side), ROVP2 (GND side), and DCDC voltage VOUT are conditions for OVP, then:
VOUT (ROVP1 + ROVP2) / ROVP2 x 2.0 V.
OVP will engage when VOUT 32 V if ROVP1 = 330 kand ROVP2 = 22 k.
Buck-boost DC/DC converter oscillation frequency (FOSC)
The regulator’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 5).
This resistor determines the charge/discharge current to the internal capacitor, thereby changing the oscillating frequency.
Refer to the following theoretical formula when setting RT:
fosc =
60 × 106
RT [Ω]
x α [kHz]
60 x 106 (V/A/S) is a constant (±5%) determined by the internal circuitry, and α is a correction factor that varies in relation to RT:
{ RT: α = 50k: 0.98, 60k: 0.985, 70k: 0.99, 80k: 0.994, 90k: 0.996, 100k: 1.0,
150k: 1.01, 200k: 1.02, 300k: 1.03, 400k: 1.04, 500k: 1.045 }
A resistor in the range of 62.6k523kis recommended. Settings that deviate from the frequency range shown
below may cause switching to stop, and proper operation cannot be guaranteed.
Fig.13 RT versus switching frequency
SYNC frequency[kHz]
Fig.14 RT versus SYNC frequency
External DC/DC converter oscillating frequency synchronization (FSYNC)
Do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is present
on the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 µs (typ.)
occurs before the internal oscillation circuitry starts to operate (only the rising edge of the input clock signal on the SYNC
terminal is recognized). Moreover, the external synchronizing signal is given to priority when an external input frequency
is used. And in the case of using external input frequency, follow the Fig.14.
Soft Start Function
The soft-start (SS) limits the current and slows the rise-time of the output voltage during the start-up, and hence leads to
prevention of the overshoot of the output voltage and the inrush current. The SS voltage is made Low when OVP of the
overcurrent and the excess voltage is detected, and the switching is stopped. Resume operation is begun.
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© 2011 ROHM Co., Ltd. All rights reserved.
6/20
2011.04 - Rev.A

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