BD9011EKN 查看數據表（PDF） - ROHM Semiconductor
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产品描述 (功能)
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BD9011EKN
ROHM Semiconductor
BD9011EKN Datasheet PDF : 29 Pages
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●Pin configuration
●Pin function table
BD9011KV（VQFP48C）
36 35 34 33 32 31 30 29 28 27 26 25
SS2 37
COMP2 38
FB2 39
N.C 40
EXTVCC 41
N.C 42
N.C 43
VREG5 44
N.C 45
OUTL2 46
DGND2 47
SW2 48
24 DET1
23 SS1
22 COMP1
21 FB1
20 N.C
19 VREG33
18 N.C
17 VREG5A
16 N.C
15 OUTL1
14 DGND1
13 SW1
1 2 3 4 5 6 7 8 9 10 11 12
Fig-15
●Block functional descriptions
Pin
No.
Pin name
1
OUTH2
2
BOOT2
3
CL2
4
N.C
5
VCCCL2
6
N.C
7
VCC
8
VCCCL1
9
N.C
10
CL1
11
BOOT1
12
OUTH1
13
SW1
14
DGND1
15
OUTL1
16
N.C
17 VREG5A
18
N.C
19 VREG33
20
N.C
21
FB1
22
COMP1
23
SS1
24
DET1
25
STB
26
EN1
27
EN2
28
N.C
29
GND
30
GNDS
31
LOFF
32
N.C
33
RT
34
SYNC
35
LLM
36
DET2
37
SS2
38
COMP2
39
FB2
40
N.C
41 EXTVCC
42
N.C
43
N.C
44
VREG5
45
N.C
46
OUTL2
47
DGND2
48
SW2
Function
High side FET gate drive pin 2
OUTH2 driver power pin
Over current detection pin 2
Non-connect (unused) pin
Over current detection VCC2
Non-connect (unused) pin
Input power pin
Over current detection CC1
Non-connect (unused) pin
Over current detection setting pin 1
OUTH1 driver power pin
High side FET gate drive pin 1
High side FET source pin 1
Low side FET source pin 1
Low side FET gate drive pin 1
Non-connect (unused) pin
FET drive REG input
Non-connect (unused) pin
Reference input REG output
Non-connect (unused) pin
Error amp input 1
Error amp output 1
Soft start setting pin 1
FB detector output 1
Standby ON/OFF pin
Output 1 ON/OFF pin
Output 2 ON/OFF pin
Non-connect (unused) pin
Ground
Sense ground
Over current protection OFF latch
function ON/OFF pin
Non-connect (unused) pin
Switching frequency setting pin
External synchronous pulse input pin
Built-in pull-down resistor pin
FB detector output 2
Soft start setting pin 2
Error amp output 2
Error amp input 2
Non-connect (unused) pin
External power input pin
Non-connect (unused) pin
Non-connect (unused) pin
FET drive REG output
Non-connect (unused) pin
Low side FET gate drive pin 2
Low side FET source pin 2
High side FET source pin 2
・Error amp
The error amp compares output feedback voltage to the 0.8V reference voltage and provides the comparison result as COMP voltage, which is
used to determine the switching Duty. COMP voltage is limited to the SS voltage, since soft start at power up is based on SS pin voltage.
・Oscillator (OSC)
Oscillation frequency is determined by the switching frequency pin (RT) in this block. The frequency can be set between 250kHz and 550kHz.
・ SLOPE
The SLOPE block uses the clock produced by the oscillator to generate a triangular wave, and sends the wave to the PWM comparator.
・PWM COMP
The PWM comparator determines switching Duty by comparing the COMP voltage, output from the error amp, with the triangular wave from the
SLOPE block. Switching duty is limited to a percentage of the internal maximum duty, and thus cannot be 100% of the maximum.
・Reference voltage (5Vreg，33Vreg)
This block generates the internal reference voltages: 5V and 3.3V.
・External synchronization (SYNC)
Determines the switching frequency, based on the external pulse applied.
・Over current protection (OCP)
Over current protection is activated when the VCCCL-CL voltage reaches or exceeds 90mV. When over current protection is active, Duty is low,
and output voltage also decreases. When LOFF=L, the output voltage has fallen to 70% or below and output is latched OFF. The OFF latch
mode ends when the latch is set to STB, EN.
・Sequence control (Sequence DET)
Compares FB voltage with reference voltage (0.56V) and outputs the result as DET.
・Protection circuits (UVLO/TSD)
The UVLO lock out function is activated when VREG falls to about 2.8V, while TSD turns outputs OFF when the chip temperature reaches or
exceeds 150℃. Output is restored when temperature falls back below the threshold value.
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