WED7GXXXATA33 查看數據表（PDF） - White Electronic Designs => Micro Semi

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WED7GXXXATA33

DIMMDrive Solid State ATA Flash Module

White Electronic Designs => Micro Semi 

White Electronic Designs

WED7GxxxATA33

PRELIMINARY*

MODULE PINOUT

PIN SIGNAL NOTE PIN SIGNAL NOTE PIN SIGNAL NOTE PIN SIGNAL NOTE

1

VSS

37 DQ8

1 73 OE#

109

A0

2

2

VSS

38 Reserved

74 IO16

3 110 NC

3

DQ0

39 DQ9

1 75

VSS

111 A10

4

4 Reserved

40 Reserved

76

VSS

112 Reserved

5

DQ1

41 DQ10

1 77 Reserved

113

VCC

6 Reserved

42 Reserved

78 Reserved

114

VCC

7

DQ2

43 DQ11

1 79 Reserved

115 Reserved

8 Reserved

44 Reserved

80 Reserved

116 Reserved

9

DQ3

45

VCC

81

VCC

117 Reserved

10 Reserved

46

VCC

82

VCC

118 Reserved

11

VCC

47 DQ12

1 83 Reserved

119

VSS

12

VCC

48 Reserved

84 Reserved

120

VSS

13 DQ4

49 DQ13

1 85 Reserved

121 Reserved

14 Reserved

50 Reserved

86 Reserved

122 Reserved

15 DQ5

51 DQ14

1 87 Reserved

123 Reserved

16 Reserved

52 Reserved

88 Reserved

124 Reserved

17 DQ6

53 DQ15

1 89 Reserved

125 Reserved

18 Reserved

54 Reserved

90 Reserved

126 Reserved

19 DQ7

55

VSS

91

VSS

127 Reserved

20 Reserved

56

VSS

92

VSS

128 Reserved

21

VSS

57 Reserved

93 Reserved

129

VCC

22

VSS

58 Reserved

94 Reserved

130

VCC

23 CE0#

59 Busy

4 95 Reserved

131 Reserved

24 Reserved

60

NC

96 Reserved

132 Reserved

25 CE1#

1 61 BVD1

3 97 Reserved

133 Reserved

26 Reserved

62 BVD2

3 98 Reserved

134 Reserved

27

VCC

63

VCC

99 Reserved

135 Reserved

28

VCC

64

VCC

100 Reserved

136 Reserved

29

A0

65 RST

4 101

VCC

137 Reserved

30

A3

66 IOWR

3 102

VCC

138 Reserved

31

A1

67 WE#

103

A6

2 139

VSS

32

A4

2 68 IORD

3 104

A7

2 140

VSS

33

A2

69 Reserved

105

A8

2 141 Reserved

34

A5

2 70 REG

3 106 NC

142 Reserved

35

VSS

71 Reserved

107

VSS

143

VCC

36

VSS

72 INPACK

3 108

VSS

144

VCC

Note: 1.) 16-Bit bus mode signals not used (floating) in 9-bit mode

CE1# signal in 16-bit only mode should be tied to CE0#

2.) Optional addresses, do not have to be connected for module use in Memory Mapped Mode

3.) Optional test signals not used in Memory Mapped Mode

4.) Busy, RST and A10 signals are optional in Memory Mapped Mode

NC - pins internally not connected

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

July, 2002

Rev. 0

2

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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