AD7804 查看數據表（PDF） - Analog Devices
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AD7804 Datasheet PDF : 28 Pages
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AD7804/AD7805/AD7808/AD7809
AD7804/AD7808 TIMING CHARACTERISTICS1(VDD= 3.3 V ؎ 10% to 5 V ؎ 10%; AGND = DGND = 0 V; Reference =
Internal Reference. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
Limit at TMIN, TMAX
All Versions
Units
Description
t1
100
t2
40
t3
40
t4
30
t5
30
t6
5
t6A
6
t7
90
20
t8
40
t9
100
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns min
ns min
CLKIN Cycle Time
CLKIN High Time
CLKIN Low Time
FSIN Setup Time
Data Setup Time
Data Hold Time
LDAC Hold Time
FSIN Hold Time
LDAC, CLR Pulsewidth
LDAC Setup Time
NOTES
1Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are specified with tr = tf = 5 ns and
timed from a voltage of (VIL + VIH)/2.
Specifications subject to change without notice.
CLKIN(I)
FSIN(I)
SDIN(I)
LDAC1
LDAC2
t4
t5
t6
DB15
t1
t2
t3
t7
DB0
t6A
t5
t9
t8
CLR
t8
1TIMING REQUIREMENTS FOR SYNCHRONOUS LDAC UPDATE OR LDAC MAY BE TIED PERMANENTLY LOW IF REQUIRED.
2TIMING REQUIREMENTS FOR ASYNCHRONOUS LDAC UPDATE.
Figure 1. Timing Diagram for AD7804 and AD7808
–4–
REV. A
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