BR93LC46-W 查看數據表（PDF） - ROHM Semiconductor
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BR93LC46-W Datasheet PDF : 11 Pages
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Memory ICs
BR93LC46-W / BR93LC46F-W / BR93LC46RF-W /
BR93LC46FJ-W / BR93LC46RFJ-W / BR93LC46FV-W
(2) Operation timing characteristics
For 5V operation (unless otherwise noted, Ta = −40 to + 85°C, VCC = 5.0V ± 10%)
Parameter
Symbol Min. Typ. Max.
Unit
SK clock frequency
fSK
−
−
1
MHz
SK "HIGH" time
SK "LOW" time
CS "LOW" time
tSKH
450
−
−
ns
tSKL
450
−
−
ns
tCS
450
−
−
ns
CS setup time
tCSS
50
−
−
ns
DI setup time
tDIS
100
−
−
ns
CS hold time
tCSH
0
−
−
ns
DI hold time
tDIH
100
−
−
ns
Data "1" output delay time
tPD1
−
−
500
ns
Data "0" output delay time
Time from CS to output confirmation
tPD0
−
−
500
ns
tSV
−
−
500
ns
Time from CS to output High impedance
tDF
−
−
100
ns
Write cycle time
tE / W
−
−
10
ms
For low voltage operation (unless otherwise noted, Ta = −40 to + 85°C, VCC = 3.0V ± 10%)
Parameter
Symbol Min. Typ. Max.
Unit
SK clock frequency
fSK
−
−
SK "HIGH" time
tSKH
1
−
SK "LOW" time
tSKL
1
−
CS "LOW" time
tCS
1
−
CS setup time
tCSS
200
−
DI setup time
tDIS
400
−
CS hold time
tCSH
0
−
DI hold time
tDIH
400
−
Data "1" output delay time
tPD1
−
−
Data "0" output delay time
tPD0
−
−
Time from CS to output confirmation
tSV
−
−
Time from CS to output High impedance
tDF
−
−
Write cycle time
tE / W
−
−
250
kHz
−
µs
−
µs
−
µs
−
ns
−
ns
−
ns
−
ns
2
µs
2
µs
2
µs
400
ns
25
ms
When reading at low voltage (unless otherwise noted, Ta = −40 to + 85°C, VCC = 2.0V)
Parameter
Symbol Min. Typ. Max.
Unit
SK clock frequency
SK "HIGH" time
fSK
−
−
200
kHz
tSKH
2
−
−
µs
SK "LOW" time
tSKL
2
−
−
µs
CS "LOW" time
CS setup time
DI setup time
CS hold time
tCS
2
−
−
µs
tCSS
400
−
−
ns
tDIS
800
−
−
ns
tCSH
0
−
−
ns
DI hold time
tDIH
800
−
−
ns
Data "1" output delay time
tPD1
−
−
4
µs
Data "0" output delay time
tPD0
−
−
4
µs
Time from CS to output High impedance
tDF
−
−
800
ns
Not designed for radiative rays.
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