BS62LV1028DCP70 查看數據表（PDF） - Brilliance Semiconductor

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BS62LV1028DCP70

Very Low Power/Voltage CMOS SRAM 128K X 8 bit

Brilliance Semiconductor 

BSI

BS62LV1028

„ DC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC )

PARAMETER

NAME

VIL

VIH

IIL

PARAMETER

Guaranteed Input Low

Voltage(2)

Guaranteed Input High

Voltage(2)

Input Leakage Current

TEST CONDITIONS

Vcc=3.0V

Vcc = Max, VIN = 0V to Vcc

Vcc=3.0V

ILO

Output Leakage Current

Vcc = Max, CE1= VIH, CE2= VIL, or

OE = VIH, VI/O = 0V to Vcc

VOL

Output Low Voltage

Vcc = Max, IOL = 2.0mA

Vcc=3.0V

VOH

Output High Voltage

Vcc = Min, IOH = -1.0mA

Vcc=3.0V

ICC(5)

Operating Power Supply CE1 = VIL, or CE2 = VIH,

Current

IDQ = 0mA, F = Fmax(3)

55ns

70ns

Vcc=3.0V

ICCSB

Standby Current-TTL

CE1 = VIH, or CE2 = VIL,

IDQ = 0mA

Vcc=3.0V

MIN. TYP. (1) MAX. UNITS

-0.5

--

0.8

V

2.0

-- Vcc+0.3

V

--

--

1

uA

--

--

1

uA

--

--

0.4

V

2.4

--

--

V

--

--

18

mA

--

--

15

--

--

0.5

mA

ICCSB1(4)

Standby Current-CMOS

CE1≧Vcc-0.2V or CE2≦0.2V,

VIN≧Vcc-0.2V or VIN≦0.2V

Vcc=3.0V

--

0.1

2.5

uA

1. Typical characteristics are at TA = 25oC.

2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.

3. Fmax = 1/tRC .

4. IccSB1_Max. is 1.3uA at Vcc=3.0V and TA=70oC.

5. Icc_Max. is 17mA(@55ns) / 14mA(@70ns) at Vcc=3.0V and TA=0~70oC.

„ DATA RETENTION CHARACTERISTICS ( TA = -40oC to + 85oC )

SYMBOL

PARAMETER

TEST CONDITIONS

VDR

Vcc for Data Retention

CE1 ≧ Vcc - 0.2V or CE2 ≦ 0.2V,

VIN ≧ Vcc - 0.2V or VIN ≦ 0.2V

ICCDR(3)

tCDR

tR

Data Retention Current

Chip Deselect to Data

Retention Time

Operation Recovery Time

CE1 ≧ Vcc - 0.2V or CE2 ≦ 0.2V,

VIN ≧ Vcc - 0.2V or VIN ≦ 0.2V

See Retention Waveform

1. Vcc = 1.5V, TA = + 25OC

2. tRC = Read Cycle Time

3. IccDR_MAX. is 0.2uA at TA=70OC.

„ LOW VCC DATA RETENTION WAVEFORM (1) ( CE1 Controlled )

MIN. TYP. (1) MAX.

1.5

--

--

--

0.05

0.3

0

--

--

TRC (2)

--

--

UNITS

V

uA

ns

ns

Vcc

CE1

Vcc

t CDR

VIH

Data Retention Mode

VDR ≥ 1.5V

CE1 ≥ Vcc - 0.2V

Vcc

tR

VIH

„ LOW VCC DATA RETENTION WAVEFORM (2) ( CE2 Controlled )

Data Retention Mode

Vcc

Vcc

t CDR

VDR ≧ 1.5V

Vcc

tR

CE2

VIL

CE2 ≦ 0.2V

VIL

R0201-BS62LV1028

3

Revision 2.1

Jan. 2004

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