AS7C33128PFS32A-166TQC 查看數據表（PDF） - Alliance Semiconductor
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AS7C33128PFS32A-166TQC Datasheet PDF : 13 Pages
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AS7C33128PFS32A
AS7C33128PFS36A
®
Synchronous truth table
CE0 CE1 CE2 ADSP ADSC ADV WEn1 OE Address accessed
CLK
Operation
H
X
X
X
L XXX
NA
L to H
Deselect
L
L
X
L
XXXX
NA
L to H
Deselect
L
L
X
H
L XXX
NA
L to H
Deselect
L
X
H
L
XXXX
NA
L to H
Deselect
L
X
HH
L XXX
NA
L to H
Deselect
L
H
L
L
XXXL
External
L to H
Begin read
L
H
L
L
X X XH
External
L to H
Begin read
L
H
L
H
L
X
F
L
External
L to H
Begin read
L
H
L
H
L
X
FH
External
L to H
Begin read
X
X
X
H
H
L
F
L
Next
L to H
Cont. read
X
X
X
H
H
L
FH
Next
L to H
Cont. read
X
X
X
H
HH
F
L
Current
L to H Suspend read
X
X
X
H
HH
FH
Current
L to H Suspend read
H
X
X
X
H
L
F
L
Next
L to H
Cont. read
H
X
X
X
H
L
FH
Next
L to H
Cont. read
H
X
X
X
HH
F
L
Current
L to H Suspend read
H
X
X
X
HH
FH
Current
L to H Suspend read
L
H
L
H
L
X
T
X
External
L to H Begin write
X
X
X
H
H
L
T
X
Next
L to H
Cont. write
H
X
X
X
H
L
T
X
Next
L to H
Cont. write
X
X
X
H
HH
T
X
Current
L to H Suspend write
H
X
X
X
HH
T
X
Current
L to H Suspend write
1See “Write enable truth table” on page 2 for more information.
2 Q in flow through mode.
3For write operation following a READ, OE must be HIGH before the input data set up time and held HIGH throughout the input hold time.
Key: X = Don’t Care, L = Low, H = High.
DQ
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z2
Hi−Z
Hi−Z2
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
D3
D
D
D
D
3/4/02; v.1.4
Alliance Semiconductor
P. 4 of 13
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