AS7C1025A-15HFC 查看數據表（PDF） - Alliance Semiconductor
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AS7C1025A-15HFC Datasheet PDF : 8 Pages
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May 2003
AS7C1025A
AS7C31025A
®
5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)
Features
• AS7C1025A (5V version)
• AS7C31025A (3.3V version)
• Industrial and commercial temperatures
• Organization: 131,072 x 8 bits
• High speed
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
• Low power consumption: ACTIVE
- 853 mW (AS7C1025A) / max @ 10 ns (5V)
- 522 mW (AS7C31025A) / max @ 10 ns (3.3V)
• Low power consumption: STANDBY
- 55 mW (AS7C1025A) / max CMOS (5V)
- 36 mW (AS7C31025A) / max CMOS (3.3V)
Logic block diagram
VCC
GND
Input buffer
A0
A1
A2
A3
512×256×8
A4
Array
A5
(1,048,576)
A6
A7
A8
I/O7
I/O0
WE
Column decoder
Control
circuit
OE
CE
• Latest 6T 0.25u CMOS technology
• Easy memory expansion with CE, OE inputs
• Center power and ground
• TTL/LVTTL-compatible, three-state I/O
• JEDEC-standard packages
- 32-pin, 300 mil SOJ
- 32-pin, 400 mil SOJ
- 32-pin, TSOP 2
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
Pin arrangement
32-pin TSOP 2
A0 1
A1 2
A2 3
A3 4
CE 5
I/O0 6
I/O1 7
VCC 8
GND 9
I/O2 10
I/O3 11
WE 12
A4 13
A5 14
A6 15
A7 16
32 A16
31 A15
30 A14
29 A13
28 OE
27 I/O7
26 I/O6
25 GND
24 VCC
23 I/O5
22 I/O4
21 A12
20 A11
19 A10
18 A9
17 A8
32-pin SOJ (300 mil)
32-pin SOJ (400 mil)
A0
1
A1
2
A2
3
A3
4
CE
5
I/O0
6
I/O1
7
VCC
8
GND
9
I/O2
10
I/O3
11
WE
12
A4
13
A5
14
A6
15
A7
16
32 A16
31 A15
30 A14
29 A13
28 OE
27 I/O7
26 I/O6
25 GND
24
VCC
23 I/O5
22 I/O4
21 A12
20 A11
19 A10
18 A9
17 A8
Selection guide
-10
-12
-15
Maximum address access time
10
12
15
Maximum output enable access time
5
6
7
Maximum
AS7C1025A
155
150
145
operating current AS7C31025A
145
140
135
Maximum CMOS AS7C1025A
10
10
10
standby current AS7C31025A
5
5
5
-20
Unit
20
ns
8
ns
140
mA
130
mA
10
mA
5
mA
5/28/03; v.0.9.9
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