AS7C1025A-15HFC 查看數據表（PDF） - Alliance Semiconductor

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AS7C1025A-15HFC

5V/3.3V 128K X 8 CMOS SRAM (Revolutionary pinout)

Alliance Semiconductor 

AS7C1025A

AS7C31025A

®

Write cycle (over the operating range)

-10

-12

-15

-20

Parameter

Symbol Min Max Min Max Min Max Min Max Unit

Write cycle time

tWC 10 – 12 – 15 – 20 –

ns

Chip enable (CE) to write end

tCW

8 – 10 – 12 – 12 –

ns

Address setup to write end

tAW

8 – 9 – 10 – 12 –

ns

Address setup time

tAS

0–0 – 0– 0 –

ns

Write pulse width

tWP

7 – 8 – 9 – 12 –

ns

Write recovery time

tWR

0–0 – 0– 0 –

ns

Address hold from end of write

tAH

0–0 – 0– 0 –

ns

Data valid to write end

tDW

5 – 6 – 8 – 10 –

ns

Data hold time

tDH

0–0 – 0– 0 –

ns

Write enable to output in high Z tWZ

–6– 6 –6 – 8

ns

Output active from write end

tOW

1–1 – 1– 2

–

ns

Notes

4, 5

4, 5

4, 5

Write waveform 1 (WE controlled)

tWC

tAW

Address

tWP

WE

tAS

DIN

tWZ

DOUT

tWR

tAH

tDW

tDH

Data valid

tOW

5/28/03; v.0.9.9

Alliance Semiconductor

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