AS7C33512PFS18A-133 查看數據表（PDF） - Alliance Semiconductor

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AS7C33512PFS18A-133

3.3V 512K × 16/18 pipeline burst synchronous SRAM

Alliance Semiconductor 

®

Timing waveform of read/write cycle

tCYC

tCH

tCL

CLK

ADSP

tADSPS

tADSPH

Address

A1

tAS

tAH

A2

A3

GWE

tWS

tWH

CE0, CE2

CE1

ADV

OE

DIN

DOUT

(pipeline mode)

tCDF

DOUT

(flow-through mode)

tADVS

tADVH

tLZC

tCD

Q(A1)

tDS

tDH

D(A2)

tHZOE

Q(A1)

Note: Ý = XOR when MODE = HIGH/No Connect; Ý = ADD when MODE = LOW.

AS7C33512PFS16A

AS7C33512PFS18A

tLZOE

tOE

Q(A3)

tOH

Q(A3Ý01) Q(A3Ý10)

Q(A3Ý11)

Q(A3Ý01)

Q(A3Ý10)

Q(A3Ý11)

3/13/01; v.0.9

Alliance Semiconductor

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