UNR-2.5/10-D12 查看數據表（PDF） - DATEL Data Acquisition products
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UNR-2.5/10-D12 Datasheet PDF : 7 Pages
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N O N - I S O L AT E D, 3 . 3 V, 8 - 4 0 W D C / D C C O N V E R T E R S
UNR Series
Reducing Output Ripple/Noise
In addition to their internal output capacitors, UNR Series DC/DC converters
require the installation of external output capacitors to achieve their
published ripple/noise specifications. The selected caps should be low-ESR,
tantalum or electrolytic types, and they should be located as close to the
converters as possible. Recommended values are listed in the table below.
Part Number
UNR-3.3/3000-D5
UNR-3.3/2500-D12
UNR-3.3/8000-D5
UNR-3.3/12000-D5
Output Capacitor
470µF, 6V, Low ESR
100µF, 6V, Low ESR
1000µF, 6V, Low ESR
1000µF, 6V, Low ESR
Remote On/Off Control and the Logic Ground Pin
The On/Off Control pin (pin 2 on "D5" units) may be used for digitally
controlled on/off operation. A TTL logic high (+2 to +5 Volts, 250µA max.)
applied to pin 2 disables the converter. A TTL logic low (0 to +0.8 Volts,
70µA max.), or no connection, enables the converter. Control voltages
should be referenced to pin 1 (Logic Ground). Applying a voltage to the
Control pin when no input power is applied to the converter can cause
permanent damage to the converter.
The Input Return (pin 5), Output Return (pin 4) and Logic Ground (pin 1 on
"D5" models) are all tied together internal to the device. To the extent
possible, load current should be returned to pin 4. Pin 5 should be
connected back to the input supply with as low an impedance as possible so
that input return current flows through pin 5. The internal trace leading to the
Logic Ground pin is not designed to carry high currents. Devices should not
be installed in a manner that results in high current flow through pin 2 (i.e.,
pins 4 and 5 should never be left open or attached via high-impedance
connections).
"D12" models do not have On/Off Control functions. Their pin 2 (No
Connect) is not electrically connected to any internal circuitry and may be
tied to any convenient external run. Their pin 1 (Do Not Connect) is a test
point. Pin 1 may be soldered to an island for mechanical mounting
purposes, but it should not have an electrical connection to external circuitry.
Synchronization
If desired, a synchronizing clock can be applied to pin 2 on "D5" models to
control the converter’s internal clock oscillator. The applied clock should be a
square wave with a maximum 1µsec "high" duration and an amplitude
between +2V and +5V (see On/Off Control) referenced to pin 1 (Logic
Ground). The frequency of the synchronizing clock must be higher than that
of the standalone converter. Therefore, it should be 85kHz ±5kHz.
Synchronization Issues
Because of the comparatively small differential between their input and
output voltages, 5V-to-3.3V DC/DC converters capable of sourcing high
output current also demand high input current. Most of these high-current
DC/DC’s use switching architectures employing fixed-frequency clock
oscillators, and their input currents include both dc (average) and ac (ripple)
components.
If you have multiple DC/DC’s connected to a single main power bus, you may
need to consider that all the converters will not be switching at exactly the
same frequency (due to normal component and manufacturing tolerances).
Consequently, the converters may randomly "self-synchronize" in their
demanding of peak current from the main power bus. Peak currents all
drawn simultaneously can be significantly greater than the sum of average
input currents. This phenomenon can result in unwanted harmonic
interactions from converter to converter along the power bus.
One solution to this potential problem is to use the converters' On/Off Control
function to effectively "de-synchronize" their clocks. Forcing the multiple
clocks to be out of phase with each other relaxes the required performance
characteristics of the main power bus so the bus now has to carry the sum of
the average currents of all the converters plus only one peak current.
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