LCX037BLT 查看數據表（PDF） - Sony Semiconductor
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LCX037BLT Datasheet PDF : 25 Pages
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LCX037BLT
2. Clock timing conditions (Ta = 25°C)
(fHckn = 6.67MHz, fVck = 25.6kHz, fv = 60Hz)
Item
Symbol Min.
Typ.
Max.
Unit
HST
HCK
Hst rise time
Hst fall time
Hst data set-up time
Hst data hold time
Hckn rise time∗4
Hckn fall time∗4
Hck1 fall to Hck2 rise time
trHst
—
—
30
tfHst
—
—
30
tdHst
–10
0
10
thHst
65
75
85
trHckn
—
—
30
ns
tfHckn
—
—
30
to1Hck
–15
0
15
Hck1 rise to Hck2 fall time
Vst rise time
to2Hck
–15
0
15
trVst
—
—
100
VST
VCK
Vst fall time
Vst data set-up time
Vst data hold time
Vck rise time
Vck fall time
tfVst
—
—
100
tdVst
5
10
15
µs
thVst
5
10
15
trVck
—
—
100
tfVck
—
—
100
Enb rise time
Enb fall time
trEnb
—
tfEnb
—
—
100
—
100
Horizontal video period completed
ENB to Enb fall time
tdEnb
800∗5
1000
1200
Enb width
twEnb
900
1000
1100
ns
Vck rise/fall to Enb rise time
toEnb
300
400
500
Enb rise to Pst rise time
toPst
390
400
410
Pst rise time
Pst fall time
trPst
—
—
30
tfPst
—
—
30
PST Pst data set-up time
Pst data hold time
Pst rise to Hst rise time
tdPst
–10
0
thPst
65
75
toHst
—
4
10
85
— ×4 cycles of Hck
∗4 Hckn means Hck1 and Hck2.
∗5 The minimum value of tdEnb is 800ns. When H-BLK has a long period and has some time to spare, take
more time prior to other value.
–8–
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