C167CR-16F 查看數據表（PDF） - Siemens AG
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C167CR-16F Datasheet PDF : 63 Pages
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06May97@14:10h Intermediate Version
C167CR-16F
Flash Memory Configuration
Upon reset the default memory configuration of the C167CR-16F is determined by the state of its
EA pin. When EA is high the startup code is fetched from the on-chip Flash memory, when EA is low
the internal ROM is disabled and the startup code is fetched from external memory.
In order to access the on-chip Flash memory after booting from external memory the internal ROM
must be enabled via software by setting bit ROMEN in register SYSCON. The lower 32 KBytes of
the Flash memory can be mapped to segment 0 or to segment 1, controlled by bit ROMS1 in register
SYSCON. Mapping to segment 1 preserves the external memory containing the startup code, while
mapping to segment 0 replaces the lower 32 KBytes of the external memory with on-chip Flash
memory. In this case a valid vector table must be provided. As the on-chip Flash memory covers
more than segment 0 segmentation should be enabled (by clearing bit SGTDIS in register
SYSCON) in order to ensure correct stack handling when branching to the upper segments.
Whenever the internal memory configuration of the C167CR-16F is changed (enable, disable,
mapping) the following procedure must be used to ensure correct operation:
q Configure the internal ROM as required
q Execute an inter-segment branch (JMPS, CALLS, RETS)
q Reload all four DPP registers
Note: Instructions that configure the internal ROM may only be executed from internal RAM or from
external memory, not from the ROM itself.
Register SYSCON can only be modified before the execution of the EINIT instruction.
The C167CR-16F’s Bootstrap Loader provides a mechanism to load the startup code and/or the
Flash progamming routines from a remote code source via the serial interface without requiring
additional external memory. This allows for firmware updates of the Flash memory for program and/
or data values.
The Flash Control Register (FCR)
In standard operation mode the Flash memory can be accessed like the normal mask-
programmable on-chip ROM of the C167CR. So all appropriate direct and indirect addressing
modes can be used for reading the Flash memory.
All programming or erase operations of the Flash memory are controlled via the 16-bit Flash Control
Register FCR. To prevent unintentional writing to the Flash memory the FCR is locked and inactive
during standard operation mode. Before a valid access to the FCR is enabled, the Flash memory
writing mode must be entered. This is done via a special key code instruction sequence.
Note: The FCR is no real register (SFR or GPR) but is rather virtually mapped into the active
address space of the Flash memory. All even direct (mem) word accesses refer to the FCR
(no byte- or bit-addressing), while all indirect ([Rwn]) accesses refer to the Flash memory
array itself. ROM mapping and DPP referencing must be considered for FCR accesses.
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Semiconductor Group
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