CAT24C21WE-TE13 查看數據表（PDF） - Catalyst Semiconductor => Onsemi

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CAT24C21WE-TE13

1-kb Dual Mode Serial EEPROM for VESA™ "Plug-and-Play"

Catalyst Semiconductor => Onsemi 

CAT24C21

Page Write

The CAT24C21 writes up to 16 bytes of data in a single

write cycle, using the Page Write operation. The Page

Write operation (Figure 10) is initiated in the same

manner as the Byte Write operation, however instead of

terminating after the initial word is transmitted, the

Master is allowed to send up to fifteen additional bytes.

After each byte has been transmitted the CAT24C21 will

respond with an ACK, and internally increment the low

order address bits by one. The high order bits remain

unchanged.

If the Master transmits more than sixteen bytes prior to

sending the STOP condition, the address counter ‘wraps

around’, and previously transmitted data will be

overwritten.

Once all sixteen bytes are received and the STOP

condition has been sent by the Master, the internal

programming cycle begins. At this point all received data

is written to the CAT24C21 in a single write cycle.

Acknowledge Polling

The disabling of the inputs can be used to take advantage

of the typical write cycle time. Once the stop condition

is issued to indicate the end of the host’s write operation,

the CAT24C21 initiates the internal write cycle. ACK

polling can be initiated immediately. This involves

issuing the start condition followed by the slave address

for a write operation. If the CAT24C21 is still busy with

the write operation, no ACK will be returned. If the

CAT24C21 has completed the write operation, an ACK

will be returned and the host can then proceed with the

next read or write operation.

Figure 6. Start/Stop Timing

SDA

SCL

START Bit

STOP Bit

Figure 7. Acknowledge Timing

SCL FROM

1

MASTER

DATA OUTPUT

FROM TRANSMITTER

DATA OUTPUT

FROM RECEIVER

START

Figure 8. Slave Address Bits

8

9

ACKNOWLEDGE

1 0 1 0 X X X R/W

7

Doc. No. 1032, Rev. O

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