CDP1802A 查看數據表（PDF） - Intersil
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CDP1802A Datasheet PDF : 28 Pages
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CDP1802A, CDP1802AC, CDP1802BC
Static Electrical Specifications at TA = -40oC to +85oC, Except as Noted (Continued)
TEST CONDITIONS
CDP1802A
CDP1802AC,
CDP1802BC
PARAMETER
VCC,
VOUT
VIN
VDD
(NOTE 1)
(NOTE 1)
SYMBOL (V)
(V)
(V) MIN TYP MAX MIN
TYP MAX UNITS
Input Capacitance
CIN
Output Capacitance
COUT
NOTES:
1. Typical values are for TA = +25oC and nominal VDD.
2. Idle “00” at M(0000), CL = 50pF.
-
5
7.5
-
-
10
15
-
5
7.5
pF
10
15
pF
Dynamic Electrical Specifications TA = -40oC to +85oC, CL = 50pF, VDD ±5%, Except as Noted
TEST
CONDITIONS
CDP1802A,
CDP1802AC
CDP1802BC
PARAMETER
PROPAGATION DELAY TIMES
(NOTE 1)
SYMBOL VCC (V) VDD (V)
TYP
MAX
(NOTE 1)
TYP
MAX
UNITS
Clock to TPA, TPB
tPLH, tPHL
5
5
200
300
200
300
ns
5
10
150
250
-
-
ns
10
10
100
150
-
-
ns
Clock-to-Memory High-Address Byte
tPLH, tPHL
5
5
600
850
475
525
ns
5
10
400
600
-
-
ns
10
10
300
400
-
-
ns
Clock-to-Memory Low-Address Byte Valid tPLH, tPHL
5
5
250
350
175
250
ns
5
10
150
250
-
-
ns
10
10
100
150
-
-
ns
Clock to MRD
tPHL
5
5
200
300
175
275
ns
5
10
150
250
-
-
ns
10
10
100
150
-
-
ns
Clock to MRD
tPLH
5
5
200
350
175
275
ns
5
10
150
290
-
-
ns
10
10
100
175
-
-
ns
Clock to MWR
tPLH, tPHL
5
5
200
300
175
225
ns
5
10
150
250
-
-
ns
10
10
100
150
-
-
ns
Clock to (CPU DATA to BUS) Valid
tPLH, tPHL
5
5
300
5
10
250
450
250
350
-
375
ns
-
ns
10
10
100
200
-
-
ns
3-8
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