GS8180D18D-333 查看數據表（PDF） - Giga Semiconductor
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GS8180D18D-333 Datasheet PDF : 27 Pages
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Preliminary
GS8180D18D-333/300/250/200
Pin Description Table
Pin Location
B4, B8, C5, C7, N5, N6, N7, P4, P5 P7, P8, R3, R4, R5,
R7, R8, R9
A9
A8
A4
Symbol
SA
SA
R
W
B7, A5
BW0–BW1
Description
Synchronous Address Inputs
Synchronous Address Inputs
Synchronous Read
Synchronous Write
Synchronous Byte Writes
Type
Input
Input
Input
Input
Input
Comments
—
—
Active Low
Active Low
Active Low
A7, B5
B6
A6
P6
R6
R10
R11
R2
R1
H2, H10
H11
A2, A10
A11
A1
B3, C3, C11, D2, D11, E10, F3, G2, G11, J3, J11, K10,
L3, M3, M11, N2, N11, P10
B2, B11, C10, D3, E3, E11, F2, F11, G3, J10, K3, K11,
L2, L11, M10, N3, P3, P11
B1, B9, B10, C1, C2, C9, D1, D9, D10, E1, E2, E9, F1,
F9, F10, G1, G9, G10, J1, J2, J9, K1, K2, K9, L1, L9, L10,
M1, M2, M9, N1, N9, N10, P1, P2, P9
A3, C6, H1
F5, F7, G5, G7, H5, H7, J5, J7, K5, K7
E4, E8, F4, F8, G4, G8, H3, H4, H8, H9, J4, J8, K4, K8,
L4, L8
C4, C8, D4, D5, D6, D7, D8, E5, E6, E7, F6, G6, H6, J6,
K6, L5, L6, L7, M4, M5, M6, M7, M8, N4, N8
Note: NC = Not Connected to die or any other pin
NC
K
K
C
C
TMS
TDI
TCK
TDO
VREF
ZQ
MCL
CQ
CQ
D0–D17
Q0–Q17
NC
NC
VDD
VDDQ
VSS
No Connect
—
—
Input Clock
Input
Active High
Input Clock
Input
Active Low
Output Clock
Input
Active High
Output Clock
Input
Active Low
Test Mode Select
Input
—
Test Data Input
Input
—
Test Clock Input
Input
—
Test Data Output
Output
—
HSTL Input Reference Voltage Input
—
Output Impedance Matching Input Input
—
Must Connect Low
—
—
Synchronous Echo Clock Output Output Echoes C or K Clock
Synchronous Echo Clock-bar Output Output Echoes C or K Clock
Synchronous Data Inputs
Input
—
Synchronous Data Outputs
Output
—
No Connect
—
—
No Connect
Power Supply
Isolated Output Buffer Supply
—
Supply
Supply
1.8 V Nominal
1.5 V Nominal
Power Supply: Ground
Supply
—
Rev: 2.00f 6/2002
3/27
© 2002, Giga Semiconductor, Inc.
Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.
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