GS8180D18D-300 查看數據表（PDF） - Giga Semiconductor

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GS8180D18D-300

18Mb Σ2x2B4 SigmaQuad SRAM

Giga Semiconductor 

Dwg Rev. G

K

/K

Address

/R1

/W1

/R2

/W2

Preliminary

GS8180D18D-333/300/250/200

Σ2x2B4 SigmaQuad SRAM Depth Expansion

No Op

-

Read

Bank 2

Write

Bank 2

Read

Bank 1

Write

Bank 2

Read

Bank 1

Write

Bank 1

XX

B

C

D

E

F

G

D

Bank 1

D

Bank 2

C

DC0 DC1 DC2 DC3 DE0 DE1 DE2 DE3

/C

Q

Bank 1

Q

Bank 2

Q Bank 1 +

Q Bank 2

CQ

Bank 1

CQ

Bank 2

QD0 QD1 QD2 QD3

QB0 QB1 QB2 QB3

QB0 QB1 QB2 QB3 QD0 QD1 QD2 QD3

Rev: 2.00f 6/2002

9/27

© 2002, Giga Semiconductor, Inc.

Specifications cited are design targets and are subject to change without notice. For latest documentation contact your GSI representative.

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