CS43L21 查看數據表（PDF） - Cirrus Logic

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CS43L21

Low Power, Stereo Digital to Analog Converter

Cirrus Logic 

CS43L21

6.2 Power Control 1 (Address 02h) ...................................................................................................... 39

6.3 Speed Control (Address 03h) ......................................................................................................... 40

6.4 Interface Control (Address 04h) ..................................................................................................... 41

6.5 DAC Output Control (Address 08h) ................................................................................................ 41

6.6 DAC Control (Address 09h) ............................................................................................................ 42

6.7 PCMX Mixer Volume Control:

PCMA (Address 10h) & PCMB (Address 11h) ..................................................................................... 44

6.8 Beep Frequency & Timing Configuration (Address 12h) ................................................................ 45

6.9 Beep Off Time & Volume (Address 13h) ........................................................................................ 46

6.10 Beep Configuration & Tone Configuration (Address 14h) ............................................................ 47

6.11 Tone Control (Address 15h) ......................................................................................................... 48

6.12 AOUTx Volume Control:

AOUTA (Address 16h) & AOUTB (Address 17h) ................................................................................. 49

6.13 PCM Channel Mixer (Address 18h) .............................................................................................. 49

6.14 Limiter Threshold SZC Disable (Address 19h) ............................................................................. 50

6.15 Limiter Release Rate Register (Address 1Ah) .............................................................................. 51

6.16 Limiter Attack Rate Register (Address 1Bh) ................................................................................. 52

6.17 Status (Address 20h) (Read Only) ............................................................................................... 52

6.18 Charge Pump Frequency (Address 21h) ...................................................................................... 53

7. ANALOG PERFORMANCE PLOTS .................................................................................................... 54

7.1 Headphone THD+N versus Output Power Plots ............................................................................ 54

7.2 Headphone Amplifier Efficiency ...................................................................................................... 56

8. EXAMPLE SYSTEM CLOCK FREQUENCIES .................................................................................... 57

8.1 Auto Detect Enabled ....................................................................................................................... 57

8.2 Auto Detect Disabled ...................................................................................................................... 58

9. PCB LAYOUT CONSIDERATIONS ..................................................................................................... 59

9.1 Power Supply, Grounding ............................................................................................................... 59

9.2 QFN Thermal Pad .......................................................................................................................... 59

10. DIGITAL FILTERS .............................................................................................................................. 60

11. PARAMETER DEFINITIONS .............................................................................................................. 61

12. PACKAGE DIMENSIONS ................................................................................................................. 62

THERMAL CHARACTERISTICS ........................................................................................................ 62

13. ORDERING INFORMATION ............................................................................................................. 63

14. REFERENCES .................................................................................................................................... 63

15. REVISION HISTORY ......................................................................................................................... 63

4

DS723A1

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