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CS61310(2003) 查看數據表(PDF) - Cirrus Logic

零件编号
产品描述 (功能)
生产厂家
CS61310
(Rev.:2003)
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CS61310 Datasheet PDF : 30 Pages
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CS61310
1. CHARACTERISTICS AND SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is
not guaranteed at these extremes
Parameter
Symbol
Min
Max
Units
DC Supply
(referenced to RGND=TGND=0 V)
Input Voltage, Any Pin
Input Current, Any Pin
Ambient Operating Temperature
Storage Temperature
(Note 1)
RV+
TV+
Vin
Iin
TA
Tstg
-
6.0
V
-
(RV+) + 0.3
V
RGND-0.3 (RV+) + 0.3
V
-10
10
mA
-40
85
°C
-65
150
°C
Notes: 1. Transient currents of up to 100 mA will not cause SCR latch-up. Also TTIP, TRING, TV+ and TGND can
withstand a continuous current of 100 mA.
RECOMMENDED OPERATING CONDITIONS
Parameter
DC Supply
Ambient Operating Temperature
Power Consumption
Symbol Min
Typ
Max Units
(Note 2) RV+, TV+ 4.75
5.0
5.25
V
TA
(Notes 3, 4, 5) PC
-40
25
85
°C
-
390
630 mW
Notes: 2. TV+ must not exceed RV+ by more than 0.3 V.
3. Power consumption measured while driving line load over operating temperature range. Power
consumption includes IC and load. Digital input levels are within 10% of the supply rails and digital
outputs are driving a 50 pF capacitive load.
4. Typical consumption corresponds to 50% ones density and medium line length at 5.0 V.
5. Maximum consumption corresponds to 100% ones density and maximum line length at 5.25 V.
DIGITAL CHARACTERISTICS
(TA = -40°C to 85°C; TV+, RV+ = 5.0 V ±5%; GND = 0 V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage
IOUT = -40 µA
Low-Level Output Voltage
IOUT = 1.6 mA
Input Leakage Current
Symbol Min
(Note 6) VIH
2.0
PINS 1-4, 24-28
(Note 6) VIL
-
PINS 1-4, 24-28
(Notes 6, 7) VOH
2.4
PINS 6-8, 25
(Notes 6, 7) VOL
-
PINS 6-8, 25
-
Typ
Max Units
-
-
V
-
0.8
V
-
-
V
-
0.4
V
-
±10
µA
Notes: 6. This specification guarantees TTL compatibility (VOH = 2.4 V @ IOUT = -40 µA).
7. Output drivers are TTL compatible and will drive CMOS logic levels into a CMOS load.
4
DS440F1 FEB ‘03

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