CDB8420 查看數據表（PDF） - Cirrus Logic

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CDB8420

Digital Audio Sample Rate Converter

Cirrus Logic 

CS8420

SWITCHING CHARACTERISTICS - CONTROL PORT - I²C® MODE

Inputs: Logic 0 = 0 V, Logic 1 = VD+; CL = 20 pF.

Parameter

Symbol Min Typ Max Units

SCL Clock Frequency

fscl

-

-

100

kHz

Bus Free Time Between Transmissions

tbuf

4.7

-

-

μs

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

-

-

μs

Clock Low Time

tlow

4.7

-

-

μs

Clock High Time

thigh

4.0

-

-

μs

Setup Time for Repeated Start Condition

tsust

4.7

-

-

μs

SDA Hold Time from SCL Falling

(Note 16) thdd

0

-

-

μs

SDA Setup Time to SCL Rising

tsud

250

-

-

ns

Rise Time of Both SDA and SCL Lines

tr

-

-

25

ns

Fall Time of Both SDA and SCL Lines

tf

-

-

25

ns

Setup Time for Stop Condition

tsusp

4.7

-

-

μs

16. Data must be held for sufficient time to bridge the 25 ns transition time of SCL.

Stop Start

Repeated

Start

SDA

SCL

t buf

t hdst

t high

t hdst

tf

t low t hdd

t sud

t sust

tr

Figure 4. I²C Mode Timing

Stop

t susp

DS245F4

11

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