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CXA2126Q 查看數據表(PDF) - Sony Semiconductor

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CXA2126Q Datasheet PDF : 34 Pages
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CXA2126Q
Item
Symbol
Conditions
DC offset
Voff
Offset voltage between input and
output (Fig. 5)
Input impedance
RIN2, 3/LIN2, 3
Zin1 (excluding any external series resistor)
Input impedance
RIN1/LIN1
Zin2 (excluding any external series resistor)
Output impedance
Zout (excluding any external series resistor)
Phase difference
Vpda
f = 1kHz, 1Vrms input to two channels.
Phase difference of stereo output
measured
S/N ratio
S/NA
f = 1kHz, 1Vrms input (at maximum
volume).
HPF @20Hz, LPF@20kHz. (Fig. 6)
Electronic Volume Control
Fine volume attenuation
step
AEVC
f = 1kHz, 0.5Vrms input. Set by I2C.
(Fig.6)
Coarse volume attenuation
step
AEVF
f = 1kHz, 0.5Vrms input. Set by I2C.
(Fig.6)
Mute
Amute f = 1kHz, 1Vrms input. (Fig.6)
DC Offset -RTV, LTV
VoffTV
Offset voltage between any audio input
and RTV, LTV outputs. (Fig.5)
Min. Typ. Max. Unit
–30 — +30 mV
— 66 — k
— 33 — k
— 10 —
— 0.05 — Deg
80 90 — dB
0.6 1 1.4 dB
7.5 8 8.5 dB
— — –80 dB
–30 0 +30 mV
– 11 –

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