CXD1268 查看數據表（PDF） - Sony Semiconductor

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产品描述 (功能)

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CXD1268

CCD Vertical Clock Driver

Sony Semiconductor 

Waveform Diagram (1)

input

XV1 to XV4

output

Vφ1 to Vφ4

Waveform Diagram (2)

input

XSG1, XSG2

output

Vφ1, Vφ3

tr

10%

90%

50%

tPHL

90%

50%

10%

tTHL

tf

tPLH

tTLH

tr

90%

50%

10%

tPLH

50%

10%

90%

tTLH

tf

tPHL

tTHL

CXD1268M

VDD

GND

tr = tf = 20ns

VφM

VφL

VDD

GND

tr = tf = 20ns

VφH

VφM

Output Load Circuit Diagram

1600pF

Vφ1

3000pF

Vφ2

2000pF

1000pF

1000pF

2000pF

Vφ4

3000pF

Vφ3

1600pF

–5–

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