CXD2408AR 查看數據表（PDF） - Sony Semiconductor

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CXD2408AR

Timing Generator for Progressive Scan CCD Image Sensor

Sony Semiconductor 

AC Characteristics

1) Phase characteristics of XH1, RG, XSHP, XSHD, XRS, CL, and CLD

tCK

CK

Vpp/2

XH1

RG

XSHP

XSHD

XRS

CL

CLD

tpd1

0.3VDD

0.3VDD

tpd11

0.3VDD

0.3VDD

0.7VDD

tpd3

tpd5

0.3VDD

tpd12

tpd13

tpd4

0.3VDD

0.7VDD

tpd2

tpd6

tpd7

0.3VDD

tpd9

tpd8

0.7VDD

0.7VDD

tpd14

0.7VDD

0.7VDD

tpd10

0.7VDD

CXD2408AR

(VDD = 5.0V, Topr = 25°C, Load capacity of CL and CLD = 30pF, Load capacity of XH1, XSHP, XSHD, XRS, and RG = 10pF)

Symbol

Definition

tCK

CK cycle

tpd1 XH1 rising delay, activated by the falling edge of CK

tpd2 XH1 falling delay, activated by the falling edge of CK

tpd3 RG falling delay, activated by the rising edge of CK

tpd4 RG rising delay, activated by the falling edge of CK

tpd5 XSHP falling delay, activated by the rising edge of CK

tpd6 XSHP rising delay, activated by the falling edge of CK

tpd7 XSHD falling delay, activated by the rising edge of CK

tpd8 XSHD rising delay, activated by the falling edge of CK

tpd9 XRS falling delay, activated by the falling edge of CK

tpd10 XRS rising delay, activated by the rising edge of CK

tpd11 CL falling delay, activated by the rising edge of CK

tpd12 CL rising delay, activated by the rising edge of CK

tpd13 CLD falling delay, activated by the rising edge of CK

tpd14 CLD rising delay, activated by the falling edge of CK

–7–

Typ. Unit

41 ns

28 ns

29 ns

27 ns

33 ns

36 ns

30 ns

36 ns

29 ns

34 ns

28 ns

15 ns

17 ns

30 ns

33 ns

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