CXP85840 查看數據表（PDF） - Sony Semiconductor

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CXP85840

CMOS 8-bit Single Chip Microcomputer

Sony Semiconductor 

CXP85840A/85848A/85856A

Absolute Maximum Ratings

(Vss = 0V reference)

Item

Symbol

Ratings

Unit

Remarks

Supply voltage

Input voltage

Output voltage

VDD

VIN

VOUT

–0.3 to +7.0

V

–0.3 to +7.0∗1

V

–0.3 to +7.0∗1

V

Medium drive output voltage

VOUTP

–0.3 to +15.0

V PF0 to PF3 pins

High level output current

IOH

–5

mA

High level total output current ∑IOH

–50

mA Total of all output pins

IOL

Low level output current

IOLC

15

mA

Ports excluding large current outputs

(value per pin)

20

mA

Large current output ports

(value per pin∗2)

Low level total output current ∑IOL

100

mA Total of all output pins

Operating temperature

Topr

–20 to +75

°C

Storage temperature

Tstg

–55 to +150

°C

Allowable power dissipation

PD

1000

600

mW SDIP-64P-01

mW GFP-64P-L01

∗1 VIN and VOUT should not exceed VDD + 0.3V.

∗2 The large current output port is Port D (PD) and Port F (PF).

Note) Usage exceeding absolute maximum ratings may permanently impair the LSI. Normal operation should

be conducted under the recommended operating conditions. Exceeding those conditions may

adversely affect the reliability of the LSI.

Recommended Operating Conditions

(Vss = 0V reference)

Item

Symbol Min.

Max. Unit

Remarks

4.5

5.5

V

Guaranteed operation range for 1/2 and

1/4 frequency dividing clocks

Supply voltage

VDD

3.5

5.5

V

Guaranteed operation range for 1/16

frequency dividing clock or sleep mode

2.5

5.5

V Guaranteed data hold range for stop mode∗1

Data slicer supply voltage CVDD 4.5

5.5

V ∗5

VIH

0.7VDD

VDD

V ∗2

High level input voltage VIHS 0.8VDD

VDD

V ∗3

VIHEX VDD – 0.4 VDD + 0.3 V EXTAL pin∗4

VIL

0

0.3VDD

V ∗2

Low level input voltage VILS

0

0.2VDD

V ∗3

VILEX

–0.3

0.4

V EXTAL pin∗4

Operating temperature

Topr

–20

+75

°C

∗1 This device does not enter the stop mode.

∗2 PA, PB, PC, PE0 to PE1, SCL0 to 1, SDA0 to 1 pins.

∗3 INT2, SCK, SO, SI, HS0, HS1, RMC, EC, INT1, HSYNC, VSYNC, RST pins.

∗4 Specifies only during external clock input.

∗5 CVDD and VDD should be set to the same voltage.

– 11 –

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