CY22394ZC-XXX 查看數據表（PDF） - Cypress Semiconductor
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CY22394ZC-XXX Datasheet PDF : 17 Pages
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CY22393
CY22394
CY22395
Logic Block Diagram — CY22395
XTALIN
XTALOUT
OSC.
SHUTDOWN/OE
SCLK
SDAT
S2/SUSPEND
CONFIGURATION
FLASH
PLL1
11-Bit P
8-Bit Q
PLL2
11-Bit P
8-Bit Q
4x4
Crosspoint
Switch
Divider
/2, /3, or /4
Divider
7-Bit
Divider
7-Bit
Divider
7-Bit
LCLKE
LCLKD
CLKC
LCLKB
Pin Configurations
PLL3
11-Bit P
8-Bit Q
Divider
7-Bit
LCLKA, LCLKB, LCLKD, LCLKE referenced to LVDD
LCLKA
CY22393
16-pin TSSOP
CLKC 1
VDD 2
AGND 3
XTALIN 4
XTALOUT 5
XBUF 6
CLKD 7
CLKE 8
16 SHUTDOWN/OE
15 S2/SUSPEND
14 AVDD
13 SCLK (S1)
12 SDAT (S0)
11 GND
10 CLKA
9 CLKB
CY22394
16-pin TSSOP
CLKC 1
VDD 2
AGND 3
XTALIN 4
XTALOUT 5
XBUF 6
P–CLK 7
P+ CLK 8
16 SHUTDOWN/OE
15 S2/SUSPEND
14 AVDD
13 SCLK (S1)
12 SDAT (S0)
11 GND
10 CLKA
9 CLKB
CY22395
16-pin TSSOP
CLKC 1
VDD 2
AGND 3
XTALIN 4
XTALOUT 5
LVDD 6
LCLKD 7
LCLKE 8
16 SHUTDOWN/OE
15 S2/SUSPEND
14 AVDD
13 SCLK (S1)
12 SDAT (S0)
11 GND/LGND
10 LCLKA
9 LCLKB
Pin Definitions
Name
Pin Number Pin Number Pin Number
CY22393 CY22394 CY22395
Description
CLKC
1
1
1
Configurable clock output C
VDD
AGND
2
2
2
Power supply
3
3
3
Analog Ground
XTALIN
4
4
4
Reference crystal input or external reference clock input
XTALOUT
5
5
5
Reference crystal feedback
XBUF
6
6
N/A
Buffered reference clock output
LVDD
N/A
N/A
6
Low voltage clock output power supply
CLKD or LCLKD
7
N/A
7
Configurable clock output D; LCLKD referenced to LVDD
P– CLK
N/A
7
N/A
LV PECL output[1]
CLKE or LCLKE
8
N/A
8
Configurable clock output E; LCLKE referenced to LVDD
P+ CLK
N/A
8
N/A
LV PECL output[1]
Note
1. LVPECL outputs require an external termination network.
Document #: 38-07186 Rev. *C
Page 3 of 17
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