CY7B992-7LMB(2001) 查看數據表（PDF） - Cypress Semiconductor

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CY7B992-7LMB
(Rev.:2001)

Programmable Skew Clock Buffer

Cypress Semiconductor 

CY7B991

CY7B992

Capacitance[12]

Parameter

Description

Test Conditions

Max.

CIN

Input Capacitance

TA = 25°C, f = 1 MHz, VCC = 5.0V

10

Note:

12. Applies to REF and FB inputs only. Tested initially and after any design or process changes that may affect these parameters.

Unit

pF

AC Test Loads and Waveforms

5V

R1 R1=130

R2=91

CL = 50 pF (CL =30 pF for –2 and –5 devices)

CL

R2 (Includes fixture and probe capacitance)

7B991–4

TTL AC Test Load (CY7B991)

3.0V

2.0V

Vth =1.5V

0.8V

0.0V

2.0V

Vth =1.5V

0.8V

≤1ns

≤1ns

7B991–5

TTL Input Test Waveform (CY7B991)

VCC

R1=100

R1

R2=100

CL = 50 pF (CL =30 pF for –2 and –5 devices)

(Includes fixture and probe capacitance)

CL

R2

7B991–6

CMOS AC Test Load (CY7B992)

VCC

80%

Vth = VCC/2

20%

0.0V

80%

Vth = VCC/2

20%

≤3ns

≤3ns

7B991–7

CMOS Input Test Waveform (CY7B992)

Document #: 38-07138 Rev. **

Page 5 of 15

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