CY7C008V-20 查看數據表（PDF） - Cypress Semiconductor
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CY7C008V-20 Datasheet PDF : 18 Pages
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Switching Waveforms
Read Cycle No.1 (Either Port Address Access)[19, 20, 21]
tRC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
Read Cycle No.2 (Either Port CE/OE Access)[19, 22, 23]
CE
OE
DATA OUT
ICC
CURRENT
ISB
tACE
tDOE
tLZOE
tLZCE
tPU
Read Cycle No. 3 (Either Port)[19, 21, 22, 23]
tRC
ADDRESS
tAA
CY7C008V/009V
CY7C018V/019V
DATA VALID
tOHA
tHZCE
tHZOE
DATA VALID
tPD
tOHA
CE
DATA OUT
tLZCE
tABE
tACE
tLZCE
Notes:
19. R/W is HIGH for read cycles.
20. Device is continuously selected CE = VIL. This waveform cannot be used for semaphore reads.
21. OE = VIL.
22. Address valid prior to or coincident with CE transition LOW.
23. To access RAM, CE = VIL, SEM = VIH. To access semaphore, CE = VIH, SEM = VIL.
tHZCE
Document #: 38-06044 Rev. *C
Page 8 of 18
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