80960-40, -33, -25
Figure 10. Output Delay and Float Waveform
PCLK2:1
1.5 V
1.5 V
Outputs
TOH Min
1.5 V
TOV
Max
1.5 V
Outputs
TOF
Min
1.5 V
Max
1.5 V
F_CX011A
NOTES:
1. TOV TOH - OUTPUT DELAY - Maximum output delay is referred to as Output Valid Delay (TOV); minimum
output delay is referred to as Output Hold (TOH).
2. TOF - OUTPUT FLOAT DELAY - Output float condition occurs when the maximum output current becomes
less that ILO in magnitude.
Figure 11. Input Setup and Hold Waveform
PCLK2:1
Inputs:
(READY, HOLD, BTERM,
BOFF, DREQ3:0,
D31:0 on reads)
1.5 V
1.5 V
TIS
Min
TIH
Max
Valid
1.5 V
F_CX012A
NOTE: TIS TIH - INPUT SETUP AND HOLD - The input setup and hold requirements specify the sampling
window during which synchronous inputs must be stable for correct processor operation.
Datasheet
37